Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 80 (12x12) 16-Bit 8 MHz I/O number 48

MSP430FG47x

MIXED SIGNAL MICROCONTROLLER

SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011

POST OFFICE BOX 655303  DALLAS, TEXAS 75265

D Low Supply-Voltage Range: 1.8 V to 3.6 V

D Ultra-Low Power Consumption:

Active Mode: 262 Aat1MHz,2.2V

Standby Mode: 1.1 A

Off Mode (RAM Retention): 0.1 A

D Five Power-Saving Modes

D Wake-Up From Standby Mode in

Less Than 6 s

D 16-Bit RISC Architecture,

125-ns Instruction Cycle Time

D 16-Bit Sigma -Delta Analog-to-Digital (A/D)

Converter With Internal Reference and Five

Differential Analog Inputs

D Dual 12-Bit Digital-to-Analog (D/A)

Converter

D Dual Configurable Operational Amplifiers

D 16-Bit Timer_A With Three

Capture/Compare Registers

D 16-Bit Timer_B With Three

Capture/Compare-With-Shadow Registers

D Two Universal Serial Communication

Interfaces (USCI)

USCI_A0

-- Enhanced UART Supporting

Auto-Baudrate Detection

-- IrDA Encoder and Decoder

-- Synchronous SPI

USCI_B0

-- I

C

-- Synchronous SPI

D Integrated LCD Driver With Contrast

Control for Up to 128 Segments

D Brownout Detector

D Basic Timer With Real-Time Clock Feature

D Supply Voltage Supervisor/Monitor With

Programmable Level Detection

D On-Chip Comparator

D Serial Onboard Programming,

No External Programming Voltage Needed

Programmable Code Protection by Security

Fuse

D Bootstrap Loader

D On-Chip Emulation Module

D MSP430FG47x Family Members Include

MSP430FG477: 32KB+256B Flash Memory

2KB RAM

MSP430FG478: 48KB+256B Flash Memory

2KB RAM

MSP430FG479: 60KB+256B Flash Memory

2KB RAM

D Available in 113-Ball BGA (ZQW) and

80-Pin QFP (PN) Packages (see Available

Options)

D For Complete Module Descriptions, See the

MSP430x4xx Family User’s Guide,

Literature Number SLAU056

description

The Texas Instruments MSP430 family of ultralow-power microcontrollers consists of several devices featuring

different sets of peripherals targeted for various applications. The architecture, combined with five low-power

modes, is optimized to achieve extended battery life in portable measurement applications. The device features

a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code

efficiency.The digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in less

than 6 s.

The MSP430FG47x is a microcontroller configuration with two 16-bit timers, a basic timer w ith a real-time c lock,

a high performance 16-bit sigma-delta A/D converter, dual 12-bit D/A converters, two configurable operational

amplifiers, two universal serial communication interface, 48 I/O pins, and a liquid crystal display driver.

Typical applications for this device include analog and digital sensor systems, digital motor control, remote

controls, thermostats, digital timers, hand-held meters, etc.

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range

from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage

because very small parametric changes could cause the device not to meet its published specifications. These devices have limited

built-in ESD protection.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of a ll parameters.

Summary of content (91 pages)

PAGE 1
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 D Low Supply-Voltage Range: 1.8 V to 3.6 V D Ultra-Low Power Consumption: D D D D D D D D D Active Mode: 262 A at 1 MHz, 2.2 V Standby Mode: 1.1 A Off Mode (RAM Retention): 0.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 AVAILABLE OPTIONS† TA PACKAGED DEVICES‡ PLASTIC 113-BALL BGA (ZQW) PLASTIC 80-PIN QFP (PN) MSP430FG477IZQW MSP430FG478IZQW MSP430FG479IZQW MSP430FG477IPN MSP430FG478IPN MSP430FG479IPN --40C to 85C † For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com.
PAGE 3
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 pin designation, MSP430FG47xIZQW A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 C1 C2 C3 C11 C12 D1 D2 D4 D5 D6 D7 D8 D9 D11 D12 E1 E2 E4 E5 E6 E7 E8 E9 E11 E12 F1 F2 F4 F5 F8 F9 F11 F12 G1 G2 G4 G5 G8 G9 G11 G12 H1 H2 H4 H5 H6 H7 H8 H9 H11 H12 J1 J2 J4 J5 J6 J7 J8 J9 J11 J12 K1 K2 K11 K12 L1 L2 L3
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 P6.6/OA1I1 (SW1A) P6.5/OA0I2 (SW0B) P6.4/A1-/OA1FB P6.2/OA0I1 (SW0A) P6.3/A1+/OA1O P6.1/A0-/OA0FB XT2OUT P6.0/A0+/OA0O TDO/TDI XT2IN TMS TDI/TCLK TCK RST/NMI P2.5/UCA0RXD/UCA0SOMI P2.4/UCA0TXD/UCA0SIMO DVSS2 P2.3/TB2 DVCC2 DVSS1 pin designation, MSP430FG47xIPN 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 DVCC1 1 60 VREF P2.2/TB1 P2.1/TB0/S0 2 3 59 58 P6.7/OA1I2/SVSIN (SW1B) P1.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 functional block diagram XIN/ XT2IN XOUT/ XT2OUT 2 2 DVCC1/2 DVSS1/2 AVCC AVSS P1.x/P2.x 2x8 P3.x/P4.x P5.x/P6.x 4x8 ACLK Oscillators FLL+ Flash SMCLK 60kB 48kB 32kB MCLK CPU 64kB MAB incl.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 Terminal Functions TERMINAL NO. NAME I/O DESCRIPTION 80 PIN 113 PIN AVCC 52 F12 Analog supply voltage, positive terminal. AVSS 53 E12 Analog supply voltage, negative terminal. DVCC1 1 A1 Digital supply voltage, positive terminal. Supplies all digital parts. DVSS1 79 A3 Digital supply voltage, negative terminal. Supplies all digital parts. DVCC2 80 A2 Digital supply voltage, positive terminal.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 Terminal Functions (continued) TERMINAL NO. I/O DESCRIPTION B1 I/O General-purpose digital I/O pin Timer_B, capture: CCI1A/B input, compare: Out1 output 77 B4 I/O General-purpose digital I/O pin Timer_B, capture: CCI2A/B input, compare: Out2 output P2.4/UCA0TXD/ UCA0SIMO 76 A4 I/O General-purpose digital I/O pin USCIA transmit data output in UART mode, slave data in/master out in SPI mode P2.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 Terminal Functions (continued) TERMINAL NO. I/O DESCRIPTION L8 O Common output, COM0--3 are used for LCD backplanes 27 L5 I/O General-purpose digital I/O pin LCD segment output 20 P5.1/S21 28 M5 I/O General-purpose digital I/O pin LCD segment output 21 P5.2/COM1 34 M8 I/O General-purpose digital I/O pin common output, COM0--3 are used for LCD backplanes P5.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 Terminal Functions (continued) TERMINAL NO. NAME I/O DESCRIPTION 80 PIN 113 PIN S17 24 L4 O LCD segment output 17 S18 25 M4 O LCD segment output 18 S19 26 J4 O LCD segment output 19 S22 29 L6 O LCD segment output 22 S23 30 M6 O LCD segment output 23 S24 31 L7 O LCD segment output 24 S25 32 M7 O LCD segment output 25 GND 7 E2 XIN 8 E1 I Input port for crystal oscillator XT1.
PAGE 10
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 short-form description CPU The MSP430 CPU has a 16--bit RISC architecture that is highly transparent to the application. All operations, other than program-flow instructions, are performed as register operations in conjunction with seven addressing modes for source operand and four addressing modes for destination operand.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 operating modes The MSP430 has one active mode and five software selectable low-power modes of operation. An interrupt event can wake up the device from any of the five low-power modes, service the request, and restore back to the low-power mode on return from the interrupt program.
PAGE 12
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 interrupt vector addresses The interrupt vectors and the power-up starting address are located in the address range 0xFFFF to 0xFFC0. The vector contains the 16-bit address of the appropriate interrupt-handler instruction sequence. If the reset vector (located at address 0xFFFE) contains 0xFFFF (e.g., flash is not programmed) the CPU goes into LPM4 immediately after power--up.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 special function registers Most interrupt and module-enable bits are collected in the lowest address space. Special-function register bits not allocated to a functional purpose are not physically present in the device. This arrangement provides simple software access.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 interrupt flag register 1 and 2 Address 7 6 5 02h 4 3 2 1 0 NMIIFG RSTIFG PORIFG OFIFG WDTIFG rw--0 rw--(0) rw--(1) rw--1 rw--(0) WDTIFG Set on watchdog timer overflow (in watchdog mode) or security key violation. Reset on VCC power-up or a reset condition at RST/NMI pin in reset mode. OFIFG Flag set on oscillator fault. RSTIFG External reset interrupt flag.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 memory organization MSP430FG477 MSP430FG478 MSP430FG479 Memory Main: interrupt vector Main: code memory Size Flash Flash 32KB 0FFFFh to 0FFE0h 0FFFFh to 08000h 48KB 0FFFFh to 0FFE0h 0FFFFh to 04000h 60KB 0FFFFh to 0FFE0h 0FFFFh to 01100h Information memory Size Flash 256 Byte 010FFh to 01000h 256 Byte 010FFh to 01000h 256 Byte 010FFh to 01000h Boot memory Size ROM 1KB 0FFFh to 0C00h 1KB 0FFFh to 0C00h 1
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 peripherals Peripherals are connected to the CPU through data, address, and control buses and can be handled using all instructions. For complete module descriptions, see the MSP430x4xx Family User’s Guide, literature number SLAU056.
PAGE 17
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 watchdog timer (WDT+) The primary function of the WDT+ module is to perform a controlled system restart after a software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog function is not needed in an application, the module can be configured as an interval timer and can generate interrupts at selected time intervals.
PAGE 18
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 Timer_B3 Timer_B3 is a 16-bit timer/counter with three capture/compare registers. Timer_B3 can support multiple capture/compares, PWM outputs, and interval timing. Timer_B3 also has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare registers. TIMER_B3 SIGNAL CONNECTIONS INPUT PIN NUMBER PN ZQW DEVICE INPUT SIGNAL P1.
PAGE 19
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 SD16_A The SD16_A module supports 16-bit analog-to-digital conversions. The module implements a 16-bit sigma-delta core and a reference generator. In addition to external analog inputs, an internal VCC sense and temperature sensor are also available. DAC12 The DAC12 module is a 12-bit R-ladder voltage-output DAC. The DAC12 may be used in 8-bit or 12-bit mode.
PAGE 20
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 peripheral file map PERIPHERALS WITH WORD ACCESS Watchdog Watchdog timer control WDTCTL 0120h Timer_B3 Capture/compare register 2 Capture/compare register 1 Capture/compare p / p register g 0 TBCCR2 TBCCR1 TBCCR0 0196h 0194h 0192h Timer_B _ register g Capture/compare p p control 2 Capture/compare control 1 Capture/compare control 0 TBR TBCCTL2 TBCCTL1 TBCCTL0 0190h 0186h 0184h 0182h Timer_B control Timer_B in
PAGE 21
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 peripheral file map (continued) LCD voltage control 1 LCD voltage control 0 LCD voltage port control 1 LCDAVCTL1 LCDAVCTL0 LCDAPCTL1 0AFh 0AEh 0ADh LCD voltage port control 0 LCD memory 20 : LCD memory 16 LCDAPCTL0 LCDM20 : LCDM16 0ACh 0A4h : 0A0h LCD memory 15 : LCD memory 1 LCD control and mode LCDM15 : LCDM1 LCDACTL 09Fh : 091h 090h USCI A0 auto baud rate control UCA0ABCTL 0x005D USCI A0 transmit buffer
PAGE 22
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 peripheral file map (continued) PERIPHERALS WITH BYTE ACCESS RTC (Basic Timer1) Port P6 Port P5 Port P4 Port P3 Port P2 22 Real-time clock year high byte Real-time clock year low byte Real-time clock month RTCYEARH RTCYEARL RTCMON 04Fh 04Eh 04Dh Real-time clock day of month Basic Timer1 counter Basic Timer1 counter Real-time counter 4 RTCDAY BTCNT2 BTCNT1 RTCNT4 04Ch 047h 046h 045h (Real-time clock day of w
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 peripheral file map (continued) PERIPHERALS WITH BYTE ACCESS (CONTINUED) Port P1 Special functions Port P1 selection 2 register Port P1 selection P1SEL2 P1SEL 057h 026h Port P1 interrupt enable P1IE 025h Port P1 interrupt-edge select P1IES 024h Port P1 interrupt flag P1IFG 023h Port P1 direction P1DIR 022h Port P1 output P1OUT 021h Port P1 input P1IN 020h SFR interrupt flag 2 SFR iinterrupt t pt f
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 absolute maximum ratings over operating free-air temperature (see Note 1) Voltage applied at VCC to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . --0.3 V to 4.1 V Voltage applied to any pin (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . --0.3 V to VCC + 0.3 V Diode current at any device terminal . . . . . . . .
PAGE 25
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) supply current into AVCC + DVCC excluding external current PARAMETER TEST CONDITIONS TYP MAX 2.2 V 262 295 3V 420 460 2.2 V 32 62 3V 51 77 2.2 V 5 9 3V 7 13 1.0 1.8 1.0 1.8 1.1 2.0 TA = 85C 2.3 4.0 TA = --40C 1.2 2.0 1.2 2.
PAGE 26
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 typical characteristics -- LPM4 current ILPM4 -- Low-Power Mode 4 Current -- A 2.0 Vcc = 3.6 V 1.8 Vcc = 3.0 V 1.6 Vcc = 2.2 V 1.4 Vcc = 1.8 V 1.2 1.0 0.8 0.6 0.4 0.2 0.0 --40.0 --20.0 0.0 20.0 40.0 60.0 80.0 100.0 120.0 TA -- Temperature -- C Figure 2.
PAGE 27
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) Schmitt-trigger inputs -- Ports P1, P2, P3, P4, P5, and P6, RST/NMI, JTAG (TCK, TMS, TDI/TCLK, TDO/TDI) PARAMETER VIT+ Positi e going input Positive-going inp t threshold voltage oltage VIT-- Negati e going input Negative-going inp t threshold voltage oltage Vhys Input voltage hysteresis (VIT+ -- VIT-- )
PAGE 28
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) outputs -- Ports P1, P2, P3, P4, P5, and P6 PARAMETER VOH VOL High le el output High-level o tp t voltage oltage Low level output voltage Low-level TEST CONDITIONS MIN MAX IOH(max) = --1.5 mA, VCC = 2.2 V, See Note 1 VCC --0.25 VCC IOH(max) = --6 mA, VCC = 2.2 V, See Note 2 VCC --0.
PAGE 29
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) outputs -- Ports P1, P2, P3, P4, P5, and P6 (continued) TYPICAL LOW-LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE TYPICAL LOW-LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE 50 VCC = 2.2 V P1.
PAGE 30
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) wake-up LPM3 PARAMETER TEST CONDITIONS MIN f = 1 MHz td(LPM3) f = 2 MHz Delay time MAX UNIT 6 6 VCC = 2.
PAGE 31
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) typical characteristics (continued) VCC 3V VCC(min) -- V 2 VCC = 3 V Typical Conditions 1.5 t pw 1 VCC(min) 0.5 0 0.001 1 1000 1 ns tpw -- Pulse Width -- s 1 ns tpw -- Pulse Width -- s Figure 8.
PAGE 32
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) SVS (supply voltage supervisor/monitor) PARAMETER t(SVSR) TEST CONDITIONS MIN dVCC/dt > 30 V/ms (see Figure 10) 5 dVCC/dt  30 V/ms td(SVSon) SVSON, switch from VLD = 0 to VLD  0, VCC = 3 V tsettle VLD  0‡ V(SVSstart) VLD  0, VCC/dt  3 V/s (see Figure 10) 150 1.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 typical characteristics AVCC V(SVS_IT--) V(SVSstart) Software sets VLD >0: SVS is active Vhys(SVS_IT--) Vhys(B_IT--) V(B_IT--) VCC(start) Brownout Brownout Region Brownout Region 1 0 SVS out td(BOR) 1 0 td(SVSon) Set POR 1 t d(BOR) SVS Circuit is Active From VLD > to VCC < V(B_IT--) td(SVSR) undefined 0 Figure 10.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) DCO PARAMETER TEST CONDITIONS VCC f(DCOCLK) N(DCO) = 01E0h, FN_8 = FN_4 = FN_3 = FN_2 = 0, D = 2, DCOPLUS = 0 f(DCO2) FN 8 = FN_4 FN_8 FN 4 = FN_3 FN 3 = FN_2 FN 2 = 0 , DCOPLUS = 1 f(DCO27) FN 8 = FN_4 FN_8 FN 4 = FN_3 FN 3 = FN_2 FN 2 = 0, 0 DCOPLUS = 1 (see Note 1) f(DCO2) FN 8 = FN_4 FN_8 FN 4 = FN_3 FN 3 =
PAGE 35
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 f f f (DCO) f (DCO3V) (DCO) (DCO20C) 1.0 1.0 0 1.8 2.4 3.0 3.6 VCC -- V --40 --20 0 20 40 60 85 TA -- C Figure 12.
PAGE 36
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 Sn - Stepsize Ratio between DCO Taps electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) 1.17 Max 1.11 1.07 1.06 Min 1 20 27 DCO Tap Figure 13.
PAGE 37
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) crystal oscillator, LFXT1, low frequency modes (see Note 4) PARAMETER LFXT1 oscillator crystal frequency, LF mode 0, 1 fLFXT1,LF Oscillation allowance for LF crystals OALF Integrated effective load capacitance LF mode capacitance, (see Note 1) CL,eff fFault,LF TEST CONDITIONS XTS = 0, LFXT1Sx = 0 or 1
PAGE 38
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) crystal oscillator, LFXT1, high frequency modes PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT fLFXT1 LFXT1 oscillator crystal frequency Ceramic resonator 1.8 V to 3.6 V 0.45 8 MHz fLFXT1 LFXT1 oscillator crystal frequency Crystal resonator 1.8 V to 3.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) RAM PARAMETER TEST CONDITIONS VRAMh MIN CPU halted (see Note 1) MAX 1.6 UNIT V NOTE 1: This parameter defines the minimum supply voltage when the data in program memory RAM remain unchanged. No program execution should take place during this supply voltage condition.
PAGE 40
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) Comparator_A (see Note 1) PARAMETER TEST CONDITIONS I(CC) CAON = 1, 1 CARSEL = 0 0, CAREF = 0 I(Refladder/RefDiode) CAON = 1, CARSEL = 0, CAREF = 1/2/3 1/2/3, No load at P1.6/CA0 and P1.7/CA1 V(Ref025) V(Ref050) Voltage @ 0.25 V V CC Voltage @ 0.5 V V TYP MAX VCC = 2.
PAGE 41
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) typical characteristics REFERENCE VOLTAGE vs FREE-AIR TEMPERATURE REFERENCE VOLTAGE vs FREE-AIR TEMPERATURE 650 650 VCC = 2.
PAGE 42
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) SD16_A, power supply and recommended operating conditions PARAMETER AVCC ISD16 Analog supply voltage Analog supply current including internal reference TEST CONDITIONS Analog front-end input clock frequency MIN AVCC = DVCC AVSS = DVSS = 0V TYP MAX 2.5 3.
PAGE 43
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) SD16_A, performance (fSD16 = 30kHz, SD16REFON = 1, SD16BUFx = 01) PARAMETER TEST CONDITIONS VCC SD16GAINx = 1,Signal Amplitude = 500mV SD16OSRx = 256 MIN TYP 3V 84 3V 84 SD16GAINx = 1,Signal Amplitude = 500mV SD16OSRx = 1024 3V 84 Nominal gain SD16GAINx = 1, SD16OSRx = 1024 3V dG/dT Gain tempe
PAGE 44
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) SD16_A, linearity (fSD16 = 1MHz, SD16REFON = 1, SD16BUFx = 00) PARAMETER INL Integral non non-linearity linearit TEST CONDITIONS VCC MIN TYP SD16OSR = 256, SD16GAINx = 000b, Signal Amplitude = 500 mV 3V 1.
PAGE 45
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) SD16_A, built-in voltage reference PARAMETER TEST CONDITIONS VCC MIN TYP VREF Internal reference voltage SD16REFON = 1, SD16VMIDON = 0 3V IREF Reference supply current SD16REFON = 1, SD16VMIDON = 0 3V TC Temperature coefficient SD16REFON = 1, SD16VMIDON = 0 (see Note 1) 3V CREF VREF load capa
PAGE 46
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) 12-bit DAC, supply specifications PARAMETER AVCC IDD PSRR Analog supply voltage Supply current (see Notes 1 and 2) Power supply rejection ratio (see Notes 3 and 4) TEST CONDITIONS VCC AVCC = DVCC, AVSS = DVSS = 0 V MIN TYP 2.20 MAX UNIT 3.60 V DAC12AMPx = 2, DAC12IR = 0, DAC12_xDAT = 0800h 2.
PAGE 47
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) 12-bit DAC, linearity specifications (see Figure 20) PARAMETER INL DNL DNL EO TEST CONDITIONS Integral nonlinearity (see Note 1) VCC MIN TYP MAX UNIT 2.0 8.0 LSB 0.4 +1.3 LSB VREF,DAC12 = 1.2 V or VREF,ext = 2.5 V DAC12AMPx = 7, DAC12IR = 1 2.7 V VREF,ext = 1.
PAGE 48
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) 12-bit DAC, linearity specifications (continued) TYPICAL INL ERROR vs DIGITAL INPUT DATA INL -- Integral Nonlinearity Error -- LSB 4 VCC = 2.2 V, VREF = 1.
PAGE 49
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) 12-bit DAC, output specifications PARAMETER VO TEST CONDITIONS Output voltage range (see Note 1, 1 Figure 23) CL(DAC12) Max DAC12 load capacitance IL(DAC12) Max DAC12 load current RO/P(DAC12) Output resistance (see Figure 23) VCC MIN TYP MAX No Load, VREF,DAC12 = AVCC, DAC12_xDAT = 0h, DAC12IR =
PAGE 50
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) 12-bit DAC, reference input specifications PARAMETER TEST CONDITIONS VREF Reference input voltage range Ri(VREF) Reference input resistance NOTES: 1. 2. 3. 4. 5. TYP MAX DAC12IR = 0 (see Notes 1 and 2) 2.2 V/3 V VCC MIN AVCC/3 AVCC+0.2 DAC12IR = 1 (see Notes 3 and 4) 2.2 V/3 V AVCC AVCC+0.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) Conversion 1 Conversion 2 Conversion 3 VOUT 90% 90% 10% 10% tSRLH tSRHL Figure 25. Slew Rate Testing 12-bit DAC, dynamic specifications continued (TA = 25C unless otherwise noted) PARAMETER BW --3dB 3 dB bandwidth, 3-dB VDC = 1.5 V, VAC = 0.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) operational amplifier OA, supply specifications PARAMETER VCC TEST CONDITIONS VCC Supply voltage range MIN Supply current (see Note 1) Medium Mode 2.2 V/3 V Slow Mode PSRR Power supply rejection ratio MAX 180 290 110 190 50 80 2.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) operational amplifier OA, dynamic specifications PARAMETER SR TEST CONDITIONS Slew rate VCC MIN TYP Fast Mode 1.2 Medium Mode 0.8 Slow Mode 0.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) switches between OA terminals and pins PARAMETER VCC TEST CONDITIONS Supply voltage range Ilkg Input leakage current (see Note 1) TA = --40C to 55C IIN Input current Input switched to ON RON On resistance IIN = 100 A VCC MIN -- 2.2 TYP MAX 1 10 UNIT 3.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) Timer_A PARAMETER TEST CONDITIONS fTA Timer A clock frequency Timer_A Internal: SMCLK, ACLK, External: TACLK, TACLK INCLK INCLK, Duty cycle = 50% 10% tTA,cap Timer_A, capture timing TA0, TA1, TA2 VCC MIN MAX 2.2 V 8 3V 10 2.
PAGE 56
MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) USCI (UART mode) PARAMETER TEST CONDITIONS VCC MIN TYP Internal: SMCLK, ACLK External: UCLK Duty cycle = 50%  10% fUSCI USCI input clock frequency fmax,BITCLK Maximum BITCLK clock frequency (equals baudrate in MBaud) (see Note 1) t UART receive deglitch time (see Note
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) 1/fUCxCLK CKPL=0 UCLK CKPL=1 tLO/HI tLO/HI tSU,MI tHD,MI SOMI tVALID,MO SIMO Figure 31. SPI Master Mode, CKPH = 0 1/fUCxCLK CKPL=0 UCLK CKPL=1 tLO/HI tLO/HI tSU,MI tHD,MI SOMI tVALID,MO SIMO Figure 32.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) tSTE,LEAD tSTE,LAG STE 1/fUCxCLK CKPL=0 UCLK CKPL=1 tLO/HI tLO/HI tSU,SI tHD,SI SIMO tSTE,ACC tVALID,SO tSTE,DIS SOMI Figure 33.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) USCI (I2C mode) (see Figure 35) PARAMETER fUSCI USCI input clock frequency fSCL SCL clock frequency TEST CONDITIONS VCC MIN TYP Internal: SMCLK, ACLK External: UCLK Duty cycle = 50%  10% MAX UNIT fSYSTEM MHz 400 kHz 2.2 V/3 V 0 fSCL  100kHz 2.2 V/3 V 4.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) flash memory TEST CONDITIONS PARAMETER VCC(PGM/ VCC MIN TYP MAX UNIT Program and Erase supply voltage 2.2 3.6 V fFTG Flash Timing Generator frequency 257 476 kHz IPGM Supply current from DVCC during program 2.5 V/3.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P1 pin schematic: P1.0, input/output with Schmitt trigger CAPD.0 P1DIR.0 0 P1SEL2.0 1 Direction 0: Input 1: Output Pad Logic 0 Module X OUT 1 P1OUT.0 1 0 P1.0/TA0/OA0RFB P1SEL.0 Bus Keeper EN P1IN.0 EN Module X IN D P1IE.0 P1IRQ.0 EN Q SWCTL1.SWCTL8 Set P1IFG.0 OA0 P1SEL.0 P1IES.0 Interrupt Edge Select Port P1 (P1.0) pin functions PIN NAME (P1.X) (P1 X) P1.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P1 pin schematic: P1.1, input/output with Schmitt trigger CAPD.1 P1DIR.1 0 P1SEL2.1 1 Module X OUT 0 MCLK 1 Direction 0: Input 1: Output Pad Logic 1 P1OUT.1 0 P1.1/TA0/MCLK/ OA1RFB Bus Keeper EN P1SEL.1 P1IN.1 EN Module X IN D P1IE.1 EN P1IRQ.1 Q SWCTL1.SWCTL12 Set P1IFG.1 OA1 P1SEL.1 P1IES.1 Interrupt Edge Select Port P1 (P1.1) pin functions PIN NAME (P1.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P1 pin schematic: P1.2 input/output with Schmitt trigger INCH Pad Logic 1 A4- DV SS 0 SD16AE.2 CAPD.2 P1DIR.2 0 Direction 0: Input 1: Output 1 P1OUT.2 0 Module X OUT 1 P1.2/TA1/A4-/OA0I3 Bus Keeper EN P1SEL.2 P1IN.2 EN D Module X IN P1IE.2 EN P1IRQ.2 Q Set P1IFG.2 P1SEL.2 P1IES.2 OA0 Interrupt Edge Select Port P1 (P1.2) pin functions CONTROL BITS / SIGNALS PIN NAME (P1.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P1 pin schematic: P1.3, input/output with Schmitt trigger INCH =4 Pad Logic A4+ SD16AE.3 CAPD.3 P1DIR.3 0 Direction 0: Input 1: Output 1 P1OUT.3 0 Module X OUT 1 P1.3/TBOUTH/ SVSOUT/A4+/OA1I3 Bus Keeper EN P1SEL.3 P1IN.3 EN D Module X IN P1IE.3 EN P1IRQ.3 Q Set P1IFG.3 P1SEL.3 OA1 Interrupt Edge Select P1IES.3 Port P1 (P1.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P1 pin schematic: P1.4, input/output with Schmitt trigger Pad Logic DAC12_1OUT DAC12OPS INCH=3 1 A3- 0 DV SS SD16AE.4 CAPD.4 P1DIR.4 0 Direction 0: Input 1: Output 1 P1OUT.4 0 Module X OUT 1 P1.4/TBCLK/ SMCLK/A3-/ OA1I0/DAC1 Bus Keeper EN P1SEL.4 P1IN.4 EN Module X IN D P1IE.4 P1IRQ.4 EN Q Set P1IFG.4 P1SEL.4 OA1 Interrupt Edge Select P1IES.4 Port P1 (P1.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P1 pin schematic: P1.5, input/output with Schmitt trigger INCH =3 Pad Logic Ax+ SD16AE.5 CAPD.5 P1DIR.5 0 Direction 0: Input 1: Output 1 P1OUT.5 0 Module X OUT 1 P1.5/TACLK/ACLK/A3+ Bus Keeper EN P1SEL.5 P1IN.5 EN D Module X IN P1IE.5 EN P1IRQ.5 Q Set P1IFG.5 P1SEL.5 P1IES.5 Interrupt Edge Select Port P1 (P1.5) pin functions CONTROL BITS / SIGNALS PIN NAME (P1.X) X P1.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P1 pin schematic: P1.6, input/output with Schmitt trigger Pad Logic To Comparator_A From Comparator_A CAPD.6 DAC12_0OUT DAC12OPS 1 A20 DVSS INCH=2 SD16AE.6 P1DIR.6 0 Direction 0: Input 1: Output 1 P1OUT.6 0 0/1 1 P1.6/CA0/A2-/ OA0I0/DAC0 Bus Keeper EN P1SEL.6 P1IN.6 EN Module X IN D P1IE.6 P1IRQ.6 EN Q P1IFG.6 P1SEL.6 P1IES.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 Port P1 (P1.6) pin functions CONTROL BITS / SIGNALS P1DIR.x P1SEL.x P1SEL2.x = 0 CAPD.x P1SEL2.x = 0 SD16AE.x P1SEL2.x = 0 OAP (OA0) P1SEL2.x = 0 DAC12OPS (DAC12_0) I: 0, O: 1 0 0 0 xx 0 CA0 x x 1 or selected x xx x A2-- x x x 1 xx x OA0I0 x x x x 00 x DAC0 x x x x xx 1 PIN NAME (P1.X) X FUNCTION P1.6/CA0/A2--/OA0I0/ / / / / DAC0 6 P1.x (I/O) NOTES: 1. x: Don’t care.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P1 pin schematic: P1.7, input/output with Schmitt trigger Pad Logic To Comparator_A From Comparator_A CAPD.7 SD16AE.7 INCH=2 A2+ P1DIR.7 0 Direction 0: Input 1: Output 1 P1OUT.7 0 0/1 1 P1.7/CA1/A2+ Bus Keeper EN P1SEL.7 P1IN.7 EN Module X IN D P1IE.7 P1IRQ.7 EN Q P1IFG.7 P1SEL.7 P1IES.7 Set Interrupt Edge Select Port P1 (P1.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P2 pin schematic: P2.0 to P2.1, input/output with Schmitt trigger Pad Logic LCDS0 Segment Sx P2DIR.x 0 Direction 0: Input 1: Output 1 P2OUT.x 0 Module X OUT 1 P2.0/TA2/S1 P2.1/TB0/S0 Bus Keeper EN P2SEL.x P2IN.x EN Module X IN D P2IE.x EN P2IRQ.x Q Set P2IFG.x P2SEL.x P2IES.x Interrupt Edge Select Port P2 (P2.0 to P2.1) pin functions PIN NAME (P2.X) (P2 X) P2.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P2 pin schematic: P2.2 to P2.3, input/output with Schmitt trigger P2DIR.x 0 Direction 0: Input 1: Output 1 Module X OUT 0 P2OUT.x 1 Pad Logic P2.2/TB1 P2.3/TB2 P2SEL.x P2IN.x EN Module X IN D P2IE.x P2IRQ.x EN Q Set P2IFG.x P2SEL.x P2IES.x Interrupt Edge Select Port P2 (P2.2 to P2.3) pin functions PIN NAME (P2.X) (P2 X) P2.2/TB1 / X 2 FUNCTION P2.x (I/O) Timer_B3.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P2 pin schematic: P2.4 and P2.5, input/output with Schmitt trigger P2DIR.x 0 Module direction 1 P2OUT.x 0 Module X OUT Direction 0: Input 1: Output Pad Logic 1 P2.4/UCA0TXD/UCA0SIMO P2.5/UCA0RXD/UCA0SOMI P2SEL.x P2IN.x EN Module X IN D P2IE.x EN P2IRQ.x Q Set P2IFG.x P2SEL.x P2IES.x Interrupt Edge Select Port P2 (P2.4 and P2.5) pin functions PIN NAME (P2.X) (P2 X) X P2.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P2 pin schematic: P2.6 and P2.7, inpututput with Schmitt trigger LCDS0 Pad Logic Segment Sy P2DIR.x 0 Direction 0: Input 1: Output 1 P2OUT.x 0 0/1 1 P2.6/CAOUT/S2 P2.7/S3 Bus Keeper EN P2SEL.x P2IN.x P2IE.x P2IRQ.x EN Q Set P2IFG.x P2SEL.x Interrupt Edge Select P2IES.x Port P2 (P2.6 and P2.7) pin functions PIN NAME (P2.X) (P2 X) P2.6/CAOUT/S2 / / P2.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P3 pin schematic: P3.0 and P3.3, input/output with Schmitt trigger P3DIR.x 0 Module direction 1 P3OUT.x 0 Module X OUT Pad Logic Direction 0: Input 1: Output 1 P3.0/UCB0STE/UCA0CLK P3.3/UCB0CLK/UCA0STE P3SEL.x P3IN.x EN Module X IN D Port P3 (P3.0 and P3.3) pin functions PIN NAME (P3.X) (P3 X) X P3.0/UCB0STE/ / / UCA0CLK 0 P3.3/UCB0CLK/ / / UCA0STE 3 FUNCTION P3.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P3 pin schematic: P3.1 and P3.2, input/output with Schmitt trigger Pad Logic LCDS24 Segment Sy P3DIR.x 0 Module direction 1 P3OUT.x 0 Module X OUT Direction 0: Input 1: Output 1 P3.1/UCB0SIMO/UCB0SDA/S26 P3.2/UCB0SOMI/UCB0SCL/S27 Bus Keeper EN P3SEL.x P3IN.x EN Module X IN D Port P3 (P3.1 and P3.2) pin functions PIN NAME (P3.X) (P3 X) P3.1/UCB0SIMO/ / / UCB0SDA/S26 P3.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P3 pin schematic: P3.4 to P3.7, input/output with Schmitt trigger LCDS28 Pad Logic Segment Sy P3DIR.x 0 Direction 0: Input 1: Output 1 P3OUT.x 0 Module X Out 1 P3.4/S28 P3.5/S29 P3.6/S30 P3.7/S31 Bus Keeper EN P3SEL.x P3IN.x Port P3 (P3.4 to P3.7) pin functions PIN NAME (P3.X) (P3 X) X P3.4/S28 / 4 P3.5/S29 / 5 CONTROL BITS / SIGNALS FUNCTION P3.x (I/O) S28 P3.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P4 pin schematic: P4.0 to P4.7, input/output with Schmitt trigger LCDS4/8 Pad Logic Segment Sy P4DIR.x 0 Direction 0: Input 1: Output 1 P4OUT.x 0 0/1 1 P4.0/S11 P4.1/S10 P4.2/S9 P4.3/S8 P4.4/S7 P4.5/S6 P4.6/S5 P4.7/S4 Bus Keeper EN P4SEL.x P4IN.x Port P4 (P4.0 and P4.7) pin functions PIN NAME (P4.X) (P4 X) P4.0/S11 / X 0 CONTROL BITS / SIGNALS FUNCTION P4.x (I/O) S11 P4.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P5 pin schematic: P5.0 and P5.1, input/output with Schmitt trigger LCDS20 Pad Logic Segment Sy P5DIR.x 0 Direction 0: Input 1: Output 1 P5OUT.x 0 0/1 1 P5.0/S20 P5.1/S21 Bus Keeper EN P5SEL.x P5IN.x Port P5 (P5.0 and P5.1) pin functions PIN NAME (P5.X) (P5 X) P5.0/S20 / X 0 CONTROL BITS / SIGNALS FUNCTION P5.x (I/O) S20 P5.1/S21 / 1 P5.x (I/O) S21 NOTES: 1.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P5 pin schematic: P5.2 to P5.7, input/output with Schmitt trigger Pad Logic LCD Signal P5DIR.x 0 Direction 0: Input 1: Output 1 P5OUT.x 0 0/1 1 Bus Keeper EN P5SEL.x P5IN.x P5.2/COM1 P5.3/COM2 P5.4/COM3 P5.5/R23 P5.6/LCDREF/R13 P5.7/R03 Port P5 (P5.2 to P5.7) pin functions PIN NAME (P5.X) (P5 X) P5.2/COM1 / X 2 FUNCTION P5.x (I/O) COM1 P5.3/COM2 / 3 P5.4/COM3 / 4 P5.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P6 pin schematic: P6.0 and P6.3, input/output with Schmitt trigger INCH=y Pad Logic Ay+ P6DIR.x 0 Direction 0: Input 1: Output 1 P6OUT.x 0 Module X OUT 1 P6.0/A0+/OA0O P6.3/A1+/OA1O Bus Keeper EN P6SEL.x P6IN.x OAx Port P6 (P6.0 and P6.3) pin functions PIN NAME (P6.X) (P6 X) P6.0/A0+/OA0O / / P6.3/A1+/OA1O / / X 0 3 FUNCTION P6DIR.x P6SEL.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P6 pin schematic: P6.1 and P6.4, input/output with Schmitt trigger Pad Logic Ay- INCH=y P6DIR.x 0 Direction 0: Input 1: Output 1 P6OUT.x 0 0/1 1 P6.1/A0-/OA0FB P6.4/A1-/OA1FB Bus Keeper EN P6SEL.x P6IN.x OAx Port P6 (P6.1 and P6.4) pin functions PIN NAME (P6.X) (P6 X) P6.1/A0--/OA0FB / / P6.4/A1--/OA1FB / / X 1 4 FUNCTION P6.x (I/O) CONTROL BITS / SIGNALS P6DIR.x P6SEL.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P6 pin schematic: P6.2, P6.5 and P6.6, input/output with Schmitt trigger P6DIR.x 0 Direction 0: Input 1: Output 1 P6OUT.x 0 0/1 1 Pad Logic P6.2/OA0I1 (SW0A) P6.5/OA0I2 (SW0B) P6.6/OA1I1 (SW1A) Bus Keeper EN P6SEL.x P6IN.x OAx Port P6 (P6.2, P6.5 and P6.6) pin functions PIN NAME (P6.X) (P6 X) X P6.2/OA0I1 / 2 P6.5/OA0I2 / 5 FUNCTION P6.x (I/O) OA0I1 P6.x (I/O) OA0I2 P6.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Port P6 pin schematic: P6.7, input/output with Schmitt trigger VLDx = 1111 To SVS Mux P6DIR.7 0 1 P6OUT.7 0 Module X OUT 1 Pad Logic Direction 0: Input 1: Output P6.7/OA1I2/SVSIN (SW1B) Bus Keeper EN P6SEL.7 P6IN.7 OAx Port P6 (P6.7) pin functions PIN NAME (P6.X) (P6 X) X P6.7/OA1I2/SVSIN / / 7 CONTROL BITS / SIGNALS FUNCTION P6.x (I/O) P6DIR.x P6SEL.
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION Segment pin schematic: Sx, dedicated Segment Pins LCDS12/16/20/24 Pad Logic Segment Sx Sx Sx pin functions PIN NAME X CONTROL BITS / SIGNALS FUNCTION LCDSy Sx 12 Sx 13 Sx 14 Sx 15 Sx 16 Sx 17 Sx 18 Sx 1 (LCDS12) 3-state 0 (LCDS12) Sx 1 (LCDS12) 3-state 0 (LCDS12) Sx 1 (LCDS12) 3-state 0 (LCDS12) Sx 1 (LCDS12) 3-state 0 (LCDS12) Sx 1 (LCD16) 3-state 0 (LCD16
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 APPLICATION INFORMATION JTAG pins: TMS, TCK, TDI/TCLK, TDO/TDI, input/output with Schmitt trigger TDO Controlled by JTAG Controlled by JTAG JTAG TDO/TDI Controlled by JTAG DVCC DVCC TDI Fuse Burn & Test Fuse Test TDI/TCLK and DVCC Emulation Module TMS TMS DVCC During Programming Activity and During Blowing of the Fuse, Pin TDO/TDI Is Used to Apply the Test Input Data for JTAG Circuitry TCK TCK JTAG fuse che
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MSP430FG47x MIXED SIGNAL MICROCONTROLLER SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011 Data Sheet Revision History LITERATURE NUMBER SLAS580 SLAS580A SLAS580B SLAS580C SLAS580D 86 SUMMARY Product Preview release Changes throughout to update Product Preview Production Data release In recommended operating conditions table, changed maximum LFXT1 crystal frequency, f(LFXT1), with XT1 selected from 8 MHz to 6 MHz (page 24) Changed limits on td(SVSon) parameter (page 32) Corrected measurement pin name for “D
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 1-Mar-2011 OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined.
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MECHANICAL DATA MTQF010A – JANUARY 1995 – REVISED DECEMBER 1996 PN (S-PQFP-G80) PLASTIC QUAD FLATPACK 0,27 0,17 0,50 0,08 M 41 60 61 40 80 21 0,13 NOM 1 20 Gage Plane 9,50 TYP 12,20 SQ 11,80 14,20 SQ 13,80 0,25 0,05 MIN 0°– 7° 0,75 0,45 1,45 1,35 Seating Plane 0,08 1,60 MAX 4040135 / B 11/96 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.