Datasheet
Table Of Contents
- features
- description
- AVAILABLE OPTIONS
- DEVELOPMENT TOOL SUPPORT
- pin designation, MSP430xG461xIPZ
- pin designation, MSP430xG461xIZQW (top view)
- functional block diagram
- Terminal Functions
- short-form description
- CPU
- instruction set
- operating modes
- interrupt vector addresses
- special function registers (SFRs)
- memory organization
- bootstrap loader (BSL)
- flash memory
- peripherals
- DMA controller
- oscillator and system clock
- brownout, supply voltage supervisor
- brownout, supply voltage supervisor
- digital I/O
- Basic Timer1 and Real-Time Clock
- LCD_A drive with regulated charge pump
- watchdog timer (WDT+)
- universal serial communication interface (USCI)
- USART1
- hardware multiplier
- Timer_A3
- Timer_B7
- Comparator_A
- ADC12
- DAC12
- OA
- peripheral file map
- absolute maximum ratings over operating free-air temperature
- recommended operating conditions
- electrical characteristics
- supply current into AVCC + DVCC excluding external current
- supply current into AVCC + DVCC excluding external current
- Schmitt-trigger inputs -- Ports P1 to P10, RST/NMI, JTAG (TCK, TMS, TDI/TCLK, TDO/TDI)
- inputs Px.x, TAx, TBx
- leakage current -- Ports P1 to P10
- outputs -- Ports P1 to P10
- output frequency
- wake-up LPM3
- RAM
- LCD_A
- Comparator_A
- POR/brownout reset (BOR)
- SVS (supply voltage supervisor/monitor)
- DCO
- crystal oscillator, LFXT1 oscillator
- crystal oscillator, LFXT1 oscillator
- crystal oscillator, XT2 oscillator
- USCI (UART mode)
- USCI (SPI master mode)
- USCI (SPI slave mode)
- USCI (I2C mode)
- USART1
- 12-bit ADC, power supply and input range conditions
- 12-bit ADC, power supply and input range conditions
- 12-bit ADC, external reference
- 12-bit ADC, built-in reference
- 12-bit ADC, timing parameters
- 12-bit ADC, linearity parameters
- 12-bit ADC, temperature sensor and built-in VMID
- 12-bit DAC, supply specifications
- 12-bit DAC, linearity specifications
- 12-bit DAC, output specifications
- 12-bit DAC, reference input specifications
- 12-bit DAC, dynamic specifications; Vref = VCC, DAC12IR = 1
- operational amplifier OA, supply specifications
- operational amplifier OA, input/output specifications
- operational amplifier OA, dynamic specifications
- operational amplifier OA feedback network, noninverting amplifier mode (OAFCx = 4)
- operational amplifier OA feedback network, inverting amplifier mode (OAFCx = 6)
- flash memory (MSP430FG461x devices only)
- JTAG interface
- JTAG fuse
- APPLICATION INFORMATION
- input/output schematics
- Port P1, P1.0 to P1.5, input/output with Schmitt trigger
- Port P1 (P1.0 to P1.5) pin functions
- Port P1, P1.6, P1.7, input/output with Schmitt trigger
- Port P1 (P1.6 and P1.7) pin functions
- port P2, P2.0 to P2.3, P2.6 to P2.7, input/output with Schmitt trigger
- Port P2 (P2.0, P2.1, P2.2, P2.3, P2.6 and P2.7) pin functions
- port P2, P2.4 to P2.5, input/output with Schmitt trigger
- Port P2 (P2.4 and P2.5) pin functions
- port P3, P3.0 to P3.3, input/output with Schmitt trigger
- Port P3 (P3.0 to P3.3) pin functions
- port P3, P3.4 to P3.7, input/output with Schmitt trigger
- Port P3 (P3.4 to P3.7) pin functions
- port P4, P4.0 to P4.1, input/output with Schmitt trigger
- Port P4 (P4.0 to P4.1) pin functions
- port P4, P4.2 to P4.7, input/output with Schmitt trigger
- Port P4 (P4.2 to P4.5) pin functions
- port P5, P5.0, input/output with Schmitt trigger
- Port P5 (P5.0) pin functions
- port P5, P5.1, input/output with Schmitt trigger
- Port P5 (P5.1) pin functions
- port P5, P5.2 to P5.4, input/output with Schmitt trigger
- Port P5 (P5.2 to P5.4) pin functions
- port P5, P5.5 to P5.7, input/output with Schmitt trigger
- Port P5 (P5.5 to P5.7) pin functions
- port P6, P6.0, P6.2, and P6.4, input/output with Schmitt trigger
- Port P6 (P6.0, P6.2, and P6.4) pin functions
- port P6, P6.1, P6.3, and P6.5 input/output with Schmitt trigger
- Port P6 (P6.1, P6.3, and P6.5) pin functions
- port P6, P6.6, input/output with Schmitt trigger
- Port P6 (P6.6) pin functions
- port P6, P6.7, input/output with Schmitt trigger
- Port P6 (P6.7) pin functions
- port P7, P7.0 to P7.3, input/output with Schmitt trigger
- Port P7 (P7.0 to P7.1) pin functions
- port P7, P7.4 to P7.7, input/output with Schmitt trigger
- Port P7 (P7.4 to P7.5) pin functions
- port P8, P8.0 to P8.7, input/output with Schmitt trigger
- Port P8 (P8.0 to P8.1) pin functions
- Port P8 (P8.6 to P8.7) pin functions
- port P9, P9.0 to P9.7, input/output with Schmitt trigger
- Port P9 (P9.0 to P9.1) pin functions
- port P10, P10.0 to P10.5, input/output with Schmitt trigger
- Port P10 (P10.0 to P10.1) pin functions
- port P10, P10.6, input/output with Schmitt trigger
- Port P10 (P10.6) pin functions
- port P10, P10.7, input/output with Schmitt trigger
- Port P10 (P10.7) pin functions
- VeREF+/DAC0
- JTAG pins TMS, TCK, TDI/TCLK, TDO/TDI, input/output with Schmitt trigger or output
- JTAG fuse check mode
- input/output schematics
- Data Sheet Revision History
MSP430xG461x
MIXED SIGNAL MICROCONTROLLER
SLAS508I − APRIL 2006 − REVISED MARCH 2011
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Terminal Functions (Continued)
TERMINAL
NAME
NO.
PZ
NO.
ZQW
I/O DESCRIPTION
P8.2/S23 35 M5 I/O General-purpose digital I/O / LCD segment output 23
P8.1/S24 36 H5 I/O General-purpose digital I/O / LCD segment output 24
P8.0/S25 37 J5 I/O General-purpose digital I/O / LCD segment output 25
P7.7/S26 38 M6 I/O General-purpose digital I/O / LCD segment output 26
P7.6/S27 39 L6 I/O General-purpose digital I/O / LCD segment output 27
P7.5/S28 40 J6 I/O General-purpose digital I/O / LCD segment output 28
P7.4/S29 41 M7 I/O General-purpose digital I/O / LCD segment output 29
P7.3/UCA0CLK/S30 42 H6 I/O
General-purpose digital I/O / external clock input − USCI_A0/UART or SPI mode, clock
output − USCI_A0/SPI mode / LCD segment 30
P7.2/UCA0SOMI/S31 43 L7 I/O
General-purpose digital I/O / slave out/master in of USCI_A0/SPI mode / LCD segment
output 31
P7.1/UCA0SIMO/S32 44 M8 I/O
General-purpose digital I/O / slave in/master out of USCI_A0/SPI mode / LCD segment
output 32
P7.0/UCA0STE/S33 45 L8 I/O
General-purpose digital I/O / slave transmit enable—USCI_A0/SPI mode / LCD segment
output 33
P4.7/UCA0RXD/S34 46 J7 I/O
General-purpose digital I/O / receive data in − USCI_A0/UART or IrDA mode / LCD
segment output 34
P4.6/UCA0TXD/S35 47 M9 I/O
General-purpose digital I/O / transmit data out − USCI_A0/UART or IrDA mode / LCD
segment output 35
P4.5/UCLK1/S36 48 L9 I/O
General-purpose digital I/O / external clock input − USART1/UART or SPI mode,
clock output − USART1/SPI MODE / LCD segment output 36
P4.4/SOMI1/S37 49 H7 I/O
General-purpose digital I/O / slave out/master in of USART1/SPI mode / LCD segment
output 37
P4.3/SIMO1/S38 50 M10 I/O
General-purpose digital I/O / slave in/master out of USART1/SPI mode / LCD segment
output 38
P4.2/STE1/S39 51 M11 I/O
General-purpose digital I/O / slave transmit enable—USART1/SPI mode / LCD segment
output 39
COM0 52 L10 O COM0−3 are used for LCD backplanes.
P5.2/COM1 53 L12 I/O General-purpose digital I/O / common output, COM0−3 are used for LCD backplanes.
P5.3/COM2 54 J8 I/O General-purpose digital I/O / common output, COM0−3 are used for LCD backplanes.
P5.4/COM3 55 K12 I/O General-purpose digital I/O / common output, COM0−3 are used for LCD backplanes.
P5.5/R03 56 K11 I/O General-purpose digital I/O / Input port of lowest analog LCD level (V5)
P5.6/LCDREF/R13 57 J12 I/O
General-purpose digital I/O / External reference voltage input for regulated LCD voltage
/ Input port of third most positive analog LCD level (V4 or V3)
P5.7/R23 58 J11 I/O General-purpose digital I/O / Input port of second most positive analog LCD level (V2)
LCDCAP/R33 59 H11 I LCD capacitor connection / Input/output port of most positive analog LCD level (V1)
DV
CC2
60 H12 Digital supply voltage, positive terminal
DV
SS2
61 G12 Digital supply voltage, negative terminal
P4.1/URXD1 62 G11 I/O General-purpose digital I/O / receive data in—USART1/UART mode
P4.0/UTXD1 63 H9 I/O General-purpose digital I/O / transmit data out—USART1/UART mode
P3.7/TB6 64 F12 I/O
General-purpose digital I/O / Timer_B7 CCR6. Capture: CCI6A/CCI6B input, compare:
Out6 output
P3.6/TB5 65 F11 I/O
General-purpose digital I/O / Timer_B7 CCR5. Capture: CCI5A/CCI5B input, compare:
Out5 output
P3.5/TB4 66 G9 I/O
General-purpose digital I/O / Timer_B7 CCR4. Capture: CCI4A/CCI4B input, compare:
Out4 output