Datasheet
Table Of Contents
- features
- description
- AVAILABLE OPTIONS
- DEVELOPMENT TOOL SUPPORT
- pin designation, MSP430xG461xIPZ
- pin designation, MSP430xG461xIZQW (top view)
- functional block diagram
- Terminal Functions
- short-form description
- CPU
- instruction set
- operating modes
- interrupt vector addresses
- special function registers (SFRs)
- memory organization
- bootstrap loader (BSL)
- flash memory
- peripherals
- DMA controller
- oscillator and system clock
- brownout, supply voltage supervisor
- brownout, supply voltage supervisor
- digital I/O
- Basic Timer1 and Real-Time Clock
- LCD_A drive with regulated charge pump
- watchdog timer (WDT+)
- universal serial communication interface (USCI)
- USART1
- hardware multiplier
- Timer_A3
- Timer_B7
- Comparator_A
- ADC12
- DAC12
- OA
- peripheral file map
- absolute maximum ratings over operating free-air temperature
- recommended operating conditions
- electrical characteristics
- supply current into AVCC + DVCC excluding external current
- supply current into AVCC + DVCC excluding external current
- Schmitt-trigger inputs -- Ports P1 to P10, RST/NMI, JTAG (TCK, TMS, TDI/TCLK, TDO/TDI)
- inputs Px.x, TAx, TBx
- leakage current -- Ports P1 to P10
- outputs -- Ports P1 to P10
- output frequency
- wake-up LPM3
- RAM
- LCD_A
- Comparator_A
- POR/brownout reset (BOR)
- SVS (supply voltage supervisor/monitor)
- DCO
- crystal oscillator, LFXT1 oscillator
- crystal oscillator, LFXT1 oscillator
- crystal oscillator, XT2 oscillator
- USCI (UART mode)
- USCI (SPI master mode)
- USCI (SPI slave mode)
- USCI (I2C mode)
- USART1
- 12-bit ADC, power supply and input range conditions
- 12-bit ADC, power supply and input range conditions
- 12-bit ADC, external reference
- 12-bit ADC, built-in reference
- 12-bit ADC, timing parameters
- 12-bit ADC, linearity parameters
- 12-bit ADC, temperature sensor and built-in VMID
- 12-bit DAC, supply specifications
- 12-bit DAC, linearity specifications
- 12-bit DAC, output specifications
- 12-bit DAC, reference input specifications
- 12-bit DAC, dynamic specifications; Vref = VCC, DAC12IR = 1
- operational amplifier OA, supply specifications
- operational amplifier OA, input/output specifications
- operational amplifier OA, dynamic specifications
- operational amplifier OA feedback network, noninverting amplifier mode (OAFCx = 4)
- operational amplifier OA feedback network, inverting amplifier mode (OAFCx = 6)
- flash memory (MSP430FG461x devices only)
- JTAG interface
- JTAG fuse
- APPLICATION INFORMATION
- input/output schematics
- Port P1, P1.0 to P1.5, input/output with Schmitt trigger
- Port P1 (P1.0 to P1.5) pin functions
- Port P1, P1.6, P1.7, input/output with Schmitt trigger
- Port P1 (P1.6 and P1.7) pin functions
- port P2, P2.0 to P2.3, P2.6 to P2.7, input/output with Schmitt trigger
- Port P2 (P2.0, P2.1, P2.2, P2.3, P2.6 and P2.7) pin functions
- port P2, P2.4 to P2.5, input/output with Schmitt trigger
- Port P2 (P2.4 and P2.5) pin functions
- port P3, P3.0 to P3.3, input/output with Schmitt trigger
- Port P3 (P3.0 to P3.3) pin functions
- port P3, P3.4 to P3.7, input/output with Schmitt trigger
- Port P3 (P3.4 to P3.7) pin functions
- port P4, P4.0 to P4.1, input/output with Schmitt trigger
- Port P4 (P4.0 to P4.1) pin functions
- port P4, P4.2 to P4.7, input/output with Schmitt trigger
- Port P4 (P4.2 to P4.5) pin functions
- port P5, P5.0, input/output with Schmitt trigger
- Port P5 (P5.0) pin functions
- port P5, P5.1, input/output with Schmitt trigger
- Port P5 (P5.1) pin functions
- port P5, P5.2 to P5.4, input/output with Schmitt trigger
- Port P5 (P5.2 to P5.4) pin functions
- port P5, P5.5 to P5.7, input/output with Schmitt trigger
- Port P5 (P5.5 to P5.7) pin functions
- port P6, P6.0, P6.2, and P6.4, input/output with Schmitt trigger
- Port P6 (P6.0, P6.2, and P6.4) pin functions
- port P6, P6.1, P6.3, and P6.5 input/output with Schmitt trigger
- Port P6 (P6.1, P6.3, and P6.5) pin functions
- port P6, P6.6, input/output with Schmitt trigger
- Port P6 (P6.6) pin functions
- port P6, P6.7, input/output with Schmitt trigger
- Port P6 (P6.7) pin functions
- port P7, P7.0 to P7.3, input/output with Schmitt trigger
- Port P7 (P7.0 to P7.1) pin functions
- port P7, P7.4 to P7.7, input/output with Schmitt trigger
- Port P7 (P7.4 to P7.5) pin functions
- port P8, P8.0 to P8.7, input/output with Schmitt trigger
- Port P8 (P8.0 to P8.1) pin functions
- Port P8 (P8.6 to P8.7) pin functions
- port P9, P9.0 to P9.7, input/output with Schmitt trigger
- Port P9 (P9.0 to P9.1) pin functions
- port P10, P10.0 to P10.5, input/output with Schmitt trigger
- Port P10 (P10.0 to P10.1) pin functions
- port P10, P10.6, input/output with Schmitt trigger
- Port P10 (P10.6) pin functions
- port P10, P10.7, input/output with Schmitt trigger
- Port P10 (P10.7) pin functions
- VeREF+/DAC0
- JTAG pins TMS, TCK, TDI/TCLK, TDO/TDI, input/output with Schmitt trigger or output
- JTAG fuse check mode
- input/output schematics
- Data Sheet Revision History
MSP430xG461x
MIXED SIGNAL MICROCONTROLLER
SLAS508I − APRIL 2006 − REVISED MARCH 2011
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
NAME
NO.
PZ
NO.
ZQW
I/O DESCRIPTION
DV
CC1
1 A1 Digital supply voltage, positive terminal
P6.3/A3/OA1O 2 B1 I/O General-purpose digital I/O / analog input a3—12-bit ADC / OA1 output
P6.4/A4/OA1I0 3
B2
I/O General-purpose digital I/O / analog input a4—12-bit ADC / OA1 input multiplexer
on +terminal and −terminal
P6.5/A5/OA2O 4 C2 I/O General-purpose digital I/O / analog input a5—12-bit ADC / OA2 output
P6.6/A6/DAC0/OA2I0 5
C1
I/O General-purpose digital I/O / analog input a6—12-bit ADC / DAC12.0 output / OA2
input multiplexer on +terminal and −terminal
P6.7/A7/DAC1/SVSIN 6 C3 I/O
General-purpose digital I/O / analog input a7—12-bit ADC / DAC12.1 output /
analog input to brownout, supply voltage supervisor
V
REF+
7 D2 O Output of positive terminal of the reference voltage in the ADC
XIN 8 D1 I Input port for crystal oscillator XT1. Standard or watch crystals can be connected.
XOUT 9 E1 O Output terminal of crystal oscillator XT1
Ve
REF+
/DAC0 10 E2 I/O Input for an external reference voltage to the ADC / DAC12.0 output
V
REF−
/Ve
REF−
11 E4 I
Negative terminal for the ADC reference voltage for both sources, the internal
reference voltage, or an external applied reference voltage
P5.1/S0/A12/DAC1 (see Note 1) 12 F1 I/O
General-purpose digital I/O / LCD segment output 0 / analog input a12 − 12−bit
ADC / DAC12.1 output
P5.0/S1/A13/OA1I1 (see Note 1) 13 F2 I/O
General-purpose digital I/O / LCD segment output 1 / analog input a13 − 12−bit
ADC/OA1 input multiplexer on +terminal and −terminal
P10.7/S2/A14/OA2I1 (see Note 1) 14 E5 I/O
General-purpose digital I/O / LCD segment output 2 / analog input a14 − 12−bit
ADC/OA2 input multiplexer on +terminal and −terminal
P10.6/S3/A15 (see Note 1) 15 G1 I/O
General-purpose digital I/O / LCD segment output 3 / analog input a15 − 12−bit
ADC
P10.5/S4 16 G2 I/O General-purpose digital I/O / LCD segment output 4
P10.4/S5 17 F4 I/O General-purpose digital I/O / LCD segment output 5
P10.3/S6 18 H1 I/O General-purpose digital I/O / LCD segment output 6
P10.2/S7 19 H2 I/O General-purpose digital I/O / LCD segment output 7
P10.1/S8 20 F5 I/O General-purpose digital I/O / LCD segment output 8
P10.0/S9 21 J1 I/O General-purpose digital I/O / LCD segment output 9
P9.7/S10 22 J2 I/O General-purpose digital I/O / LCD segment output 10
P9.6/S11 23 G4 I/O General-purpose digital I/O / LCD segment output 11
P9.5/S12 24 K1 I/O General-purpose digital I/O / LCD segment output 12
P9.4/S13 25 L1 I/O General-purpose digital I/O / LCD segment output 13
P9.3/S14 26 M2 I/O General-purpose digital I/O / LCD segment output 14
P9.2/S15 27 K2 I/O General-purpose digital I/O / LCD segment output 15
P9.1/S16 28 L3 I/O General-purpose digital I/O / LCD segment output 16
P9.0/S17 29 M3 I/O General-purpose digital I/O / LCD segment output 17
P8.7/S18 30 H4 I/O General-purpose digital I/O / LCD segment output 18
P8.6/S19 31 L4 I/O General-purpose digital I/O / LCD segment output 19
P8.5/S20 32 M4 I/O General-purpose digital I/O / LCD segment output 20
P8.4/S21 33 G5 I/O General-purpose digital I/O / LCD segment output 21
P8.3/S22 34 L5 I/O General-purpose digital I/O / LCD segment output 22
NOTES: 1. Segments S0 through S3 are disabled when the LCD charge pump feature is enabled (LCDCPEN = 1) and cannot be used together
with the LCD charge pump. In addition, when using segments S0 through S3 with an external LCD voltage supply, V
LCD
≤ AV
CC
.