Datasheet
Table Of Contents
- features
- description
- pin designation
- functional block diagram
- Terminal Functions
- short-form description
- absolute maximum ratings
- recommended operating conditions
- electrical characteristics
- supply current into AVCC + DVCC1/2 excluding external current
- SCHMITT-trigger inputs − Ports P1, P2, P3, P4, P5, and P6; RST/NMI; JTAG: TCK, TMS, TDI/TCLK, TDO/TDI
- inputs Px.x, TAx, TBx
- leakage current − Ports P1, P2, P3, P4, P5, and P6
- outputs − Ports P1, P2, P3, P4, P5, and P6
- output frequency
- wake-up LPM3
- RAM
- LCD
- Comparator_A
- POR/brownout reset (BOR)
- SVS (supply voltage supervisor/monitor)
- DCO
- crystal oscillator, LFXT1 oscillator
- crystal oscillator, XT2 oscillator
- USART0
- 12-bit ADC, power supply and input range conditions
- 12-bit ADC, external reference
- 12-bit ADC, built-in reference
- 12-bit ADC, timing parameters
- 12-bit ADC, linearity parameters
- 12-bit ADC, temperature sensor and built-in VMID
- 12-bit DAC, supply specifications
- 12-bit DAC, linearity specifications
- 12-bit DAC, output specifications
- 12-bit DAC, reference input specifications
- 12-bit DAC, dynamic specifications; Vref = VCC, DAC12IR = 1
- operational amplifier OA, supply specifications
- operational amplifier OA, input/output specifications
- operational amplifier OA, dynamic specifications
- Flash Memory
- JTAG Interface
- JTAG Fuse
- Application Information
- input/output schematic
- Port P1, P1.0 to P1.5, input/output with Schmitt-trigger
- Port P1, P1.6, P1.7, input/output with Schmitt-trigger
- port P2, P2.0, P2.4 to P2.5, input/output with Schmitt-trigger
- port P2, P2.1 to P2.3, input/output with Schmitt-trigger
- port P2, P2.6 to P2.7, input/output with Schmitt-trigger
- port P3, P3.0 to P3.3, input/output with Schmitt-trigger
- port P3, P3.4 to P3.7, input/output with Schmitt-trigger
- port P4, P4.0 to P4.5, input/output with Schmitt-trigger
- port P4, P4.6, input/output with Schmitt-trigger
- port P4, P4.7, input/output with Schmitt-trigger
- port P5, P5.0, input/output with Schmitt-trigger
- port P5, P5.1, input/output with Schmitt-trigger
- port P5, P5.2 to P5.4, input/output with Schmitt-trigger
- port P5, P5.5 to P5.7, input/output with Schmitt-trigger
- port P6, P6.0, P6.2, and P6.4, input/output with Schmitt-trigger
- port P6, P6.1, input/output with Schmitt-trigger
- port P6, P6.3, input/output with Schmitt-trigger
- port P6, P6.5, input/output with Schmitt-trigger
- port P6, P6.6, input/output with Schmitt-trigger
- port P6, P6.7, input/output with Schmitt-trigger
- VeREF+/DAC0
- JTAG pins TMS, TCK, TDI/TCLK, TDO/TDI, input/output with Schmitt-trigger or output
- JTAG fuse check mode
- input/output schematic
- Data Sheet Revision History
- Corrections to MSP430FG43x Data Sheet (SLAS380C)
MSP430FG43x
MIXED SIGNAL MICROCONTROLLER
SLAS380C − APRIL 2004 − REVISED MARCH 2011
52
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251−1443
input/output schematic (continued)
port P3, P3.0 to P3.3, input/output with Schmitt-trigger
P3OUT.x
Module X OUT
P3DIR.x
Direction Control
From Module
P3SEL.x
D
EN
0
1
1
0
PnSel.x PnDIR.x PnOUT.x
Module X
OUT
PnIN.x Module X IN
P3Sel.1 P3DIR.1 P3OUT.1 P3IN.1
P3Sel.2 P3DIR.2 P3OUT.2 P3IN.2
P3Sel.3 P3DIR.3 P3OUT.3 P3IN.3
P3Sel.0 P3DIR.0 P3OUT.0 P3IN.0
UCLK0(out)
SOMIO(out)
DCM_SIMO0
DCM_SOMI0
DCM_UCLK0
Segment xx
0: Port active
1: Segment xx function active
SIMO0(out)
UCLK0(in)
SOMI0(in)
SIMO0(in)
STE0(in)
Module X IN
P3IN.x
Pad Logic
0: Input
1: Output
Bus
Keeper
LCDM.5
LCDM.6
LCDM.7
Direction
From Module
Control
DV
SS
DV
SS
MSP430x43xIPN (80-Pin) Only
x43xIPZ and x44xIPZ have not segment
Function on Port P3: Both lines are low.
P3.0/STE0/S31
P3.1/SIMO0/S30
P3.2/SOMI0/S29
P3.3/UCLK0/S28
Note: 0 ≤ x ≤ 3
SYNC
MM
STC
STE
SYNC
MM
STC
STE
DCM_SOMI0
DCM_SIMO0
DCM_UCLK0
Direction Control for SOMI0
Direction Control for SIMO0 and UCLK0