Datasheet
Table Of Contents
- features
- description
- pin designation
- functional block diagram
- Terminal Functions
- short-form description
- absolute maximum ratings
- recommended operating conditions
- electrical characteristics
- supply current into AVCC + DVCC1/2 excluding external current
- SCHMITT-trigger inputs − Ports P1, P2, P3, P4, P5, and P6; RST/NMI; JTAG: TCK, TMS, TDI/TCLK, TDO/TDI
- inputs Px.x, TAx, TBx
- leakage current − Ports P1, P2, P3, P4, P5, and P6
- outputs − Ports P1, P2, P3, P4, P5, and P6
- output frequency
- wake-up LPM3
- RAM
- LCD
- Comparator_A
- POR/brownout reset (BOR)
- SVS (supply voltage supervisor/monitor)
- DCO
- crystal oscillator, LFXT1 oscillator
- crystal oscillator, XT2 oscillator
- USART0
- 12-bit ADC, power supply and input range conditions
- 12-bit ADC, external reference
- 12-bit ADC, built-in reference
- 12-bit ADC, timing parameters
- 12-bit ADC, linearity parameters
- 12-bit ADC, temperature sensor and built-in VMID
- 12-bit DAC, supply specifications
- 12-bit DAC, linearity specifications
- 12-bit DAC, output specifications
- 12-bit DAC, reference input specifications
- 12-bit DAC, dynamic specifications; Vref = VCC, DAC12IR = 1
- operational amplifier OA, supply specifications
- operational amplifier OA, input/output specifications
- operational amplifier OA, dynamic specifications
- Flash Memory
- JTAG Interface
- JTAG Fuse
- Application Information
- input/output schematic
- Port P1, P1.0 to P1.5, input/output with Schmitt-trigger
- Port P1, P1.6, P1.7, input/output with Schmitt-trigger
- port P2, P2.0, P2.4 to P2.5, input/output with Schmitt-trigger
- port P2, P2.1 to P2.3, input/output with Schmitt-trigger
- port P2, P2.6 to P2.7, input/output with Schmitt-trigger
- port P3, P3.0 to P3.3, input/output with Schmitt-trigger
- port P3, P3.4 to P3.7, input/output with Schmitt-trigger
- port P4, P4.0 to P4.5, input/output with Schmitt-trigger
- port P4, P4.6, input/output with Schmitt-trigger
- port P4, P4.7, input/output with Schmitt-trigger
- port P5, P5.0, input/output with Schmitt-trigger
- port P5, P5.1, input/output with Schmitt-trigger
- port P5, P5.2 to P5.4, input/output with Schmitt-trigger
- port P5, P5.5 to P5.7, input/output with Schmitt-trigger
- port P6, P6.0, P6.2, and P6.4, input/output with Schmitt-trigger
- port P6, P6.1, input/output with Schmitt-trigger
- port P6, P6.3, input/output with Schmitt-trigger
- port P6, P6.5, input/output with Schmitt-trigger
- port P6, P6.6, input/output with Schmitt-trigger
- port P6, P6.7, input/output with Schmitt-trigger
- VeREF+/DAC0
- JTAG pins TMS, TCK, TDI/TCLK, TDO/TDI, input/output with Schmitt-trigger or output
- JTAG fuse check mode
- input/output schematic
- Data Sheet Revision History
- Corrections to MSP430FG43x Data Sheet (SLAS380C)
MSP430FG43x
MIXED SIGNAL MICROCONTROLLER
SLAS380C − APRIL 2004 − REVISED MARCH 2011
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251−1443
MSP430FG43x Terminal Functions
TERMINAL
PN
I/O
DESCRIPTION
NAME NO.
I/O
DESCRIPTION
DV
CC1
1 Digital supply voltage, positive terminal.
P6.3/A3/OA1I1/OA1O 2 I/O General-purpose digital I/O / analog input a3—12-bit ADC / OA1 output and/or input multiplexer on
+terminal and −terminal
P6.4/A4/OA1I0 3 I/O General-purpose digital I/O / analog input a4—12-bit ADC / OA1 input multiplexer on +terminal and
−terminal
P6.5/A5/OA2I1/OA2O 4 I/O General-purpose digital I/O / analog input a5—12-bit ADC / OA2 output and/or input multiplexer on
+terminal and −terminal
P6.6/A6/DAC0/OA2I0 5 I/O General-purpose digital I/O / analog input a6—12-bit ADC / DAC12.0 output / OA2 input multiplexer
on +terminal and −terminal
P6.7/A7/DAC1/
SVSIN
6 I/O General-purpose digital I/O / analog input a7—12-bit ADC / DAC12.1 output/analog input to supply
voltage supervisor
V
REF+
7 O Positive output terminal of the reference voltage in the ADC
XIN 8 I Input terminal of crystal oscillator XT1
XOUT 9 O Output terminal of crystal oscillator XT1
Ve
REF+
/DAC0 10 I/O Positive input terminal for an external reference voltage to the 12-bit ADC/DAC12.0 output
V
REF−
/Ve
REF−
11 I
Negative terminal for the 12-bit ADC’s reference voltage for both sources, the internal reference
voltage or an external applied reference voltage to the 12-bit ADC.
P5.1/S0/A12/DAC1 12 I/O General-purpose digital I/O / LCD segment output 0/ analog input a12—12-bit ADC/DAC12.1 output
P5.0/S1/A13 13 I/O General-purpose digital I/O / LCD segment output 1/ analog input a13—12-bit ADC
P4.7/S2/A14 14 I/O General-purpose digital I/O / LCD segment output 2/ analog input a14—12-bit ADC
P4.6/S3/A15 15 I/O General-purpose digital I/O / LCD segment output 3/ analog input a15—12-bit ADC
P4.5/S4 16 I/O General-purpose digital I/O / LCD segment output 4
P4.4/S5 17 I/O General-purpose digital I/O / LCD segment output 5
P4.3/S6 18 I/O General-purpose digital I/O / LCD segment output 6
P4.2/S7 19 I/O General-purpose digital I/O / LCD segment output 7
P4.1/S8 20 I/O General-purpose digital I/O / LCD segment output 8
P4.0/S9 21 I/O General-purpose digital I/O / LCD segment output 9
S10 22 O LCD segment output 10
S11 23 O LCD segment output 11
S12 24 O LCD segment output 12
S13 25 O LCD segment output 13
S14 26 O LCD segment output 14
S15 27 O LCD segment output 15
S16 28 O LCD segment output 16
S17 29 O LCD segment output 17
P2.7/ADC12CLK/S18 30 I/O General-purpose digital I/O / conversion clock—12-bit ADC / LCD segment output 18
P2.6/CAOUT/S19 31 I/O General-purpose digital I/O / Comparator_A output / LCD segment output 19
S20 32 O LCD segment output 20
S21 33 O LCD segment output 21
S22 34 O LCD segment output 22
S23 35 O LCD segment output 23
P3.7/S24 36 I/O General-purpose digital I/O / LCD segment output 24
P3.6/S25/DMAE0 37 I/O General-purpose digital I/O / LCD segment output 25/DMA Channel 0 external trigger
P3.5/S26 38 I/O General-purpose digital I/O / LCD segment output 26
P3.4/S27 39 I/O General-purpose digital I/O / LCD segment output 27