Datasheet
Table Of Contents
- features
- description
- pin designation
- functional block diagram
- Terminal Functions
- short-form description
- absolute maximum ratings
- recommended operating conditions
- electrical characteristics
- supply current into AVCC + DVCC1/2 excluding external current
- SCHMITT-trigger inputs − Ports P1, P2, P3, P4, P5, and P6; RST/NMI; JTAG: TCK, TMS, TDI/TCLK, TDO/TDI
- inputs Px.x, TAx, TBx
- leakage current − Ports P1, P2, P3, P4, P5, and P6
- outputs − Ports P1, P2, P3, P4, P5, and P6
- output frequency
- wake-up LPM3
- RAM
- LCD
- Comparator_A
- POR/brownout reset (BOR)
- SVS (supply voltage supervisor/monitor)
- DCO
- crystal oscillator, LFXT1 oscillator
- crystal oscillator, XT2 oscillator
- USART0
- 12-bit ADC, power supply and input range conditions
- 12-bit ADC, external reference
- 12-bit ADC, built-in reference
- 12-bit ADC, timing parameters
- 12-bit ADC, linearity parameters
- 12-bit ADC, temperature sensor and built-in VMID
- 12-bit DAC, supply specifications
- 12-bit DAC, linearity specifications
- 12-bit DAC, output specifications
- 12-bit DAC, reference input specifications
- 12-bit DAC, dynamic specifications; Vref = VCC, DAC12IR = 1
- operational amplifier OA, supply specifications
- operational amplifier OA, input/output specifications
- operational amplifier OA, dynamic specifications
- Flash Memory
- JTAG Interface
- JTAG Fuse
- Application Information
- input/output schematic
- Port P1, P1.0 to P1.5, input/output with Schmitt-trigger
- Port P1, P1.6, P1.7, input/output with Schmitt-trigger
- port P2, P2.0, P2.4 to P2.5, input/output with Schmitt-trigger
- port P2, P2.1 to P2.3, input/output with Schmitt-trigger
- port P2, P2.6 to P2.7, input/output with Schmitt-trigger
- port P3, P3.0 to P3.3, input/output with Schmitt-trigger
- port P3, P3.4 to P3.7, input/output with Schmitt-trigger
- port P4, P4.0 to P4.5, input/output with Schmitt-trigger
- port P4, P4.6, input/output with Schmitt-trigger
- port P4, P4.7, input/output with Schmitt-trigger
- port P5, P5.0, input/output with Schmitt-trigger
- port P5, P5.1, input/output with Schmitt-trigger
- port P5, P5.2 to P5.4, input/output with Schmitt-trigger
- port P5, P5.5 to P5.7, input/output with Schmitt-trigger
- port P6, P6.0, P6.2, and P6.4, input/output with Schmitt-trigger
- port P6, P6.1, input/output with Schmitt-trigger
- port P6, P6.3, input/output with Schmitt-trigger
- port P6, P6.5, input/output with Schmitt-trigger
- port P6, P6.6, input/output with Schmitt-trigger
- port P6, P6.7, input/output with Schmitt-trigger
- VeREF+/DAC0
- JTAG pins TMS, TCK, TDI/TCLK, TDO/TDI, input/output with Schmitt-trigger or output
- JTAG fuse check mode
- input/output schematic
- Data Sheet Revision History
- Corrections to MSP430FG43x Data Sheet (SLAS380C)

MSP430FG43x
MIXED SIGNAL MICROCONTROLLER
SLAS380C − APRIL 2004 − REVISED MARCH 2011
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251−1443
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
Comparator_A (see Note 1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
CAON 1 CARSEL 0 CAREF 0
V
CC
= 2.2 V 25 40
A
I
(CC)
CAON=1, CARSEL=0, CAREF=0
V
CC
= 3 V 45 60
μA
I
CAON=1, CARSEL=0, CAREF=1/2/3,
No load at P1 6/CA0 and
V
CC
= 2.2 V 30 50
A
I
(Refladder/RefDiode)
No load at P1.6/CA0 and
P1.7/CA1
V
CC
= 3 V 45 71
μA
V
(Ref025)
Voltage @ 0.25 V
CC
node
V
CC
PCA0=1, CARSEL=1, CAREF=1,
No load at P1.6/CA0 and P1.7/CA1
V
CC
= 2.2 V / 3 V 0.23 0.24 0.25
V
(Ref050)
Voltage @ 0.5 V
CC
node
V
CC
PCA0=1, CARSEL=1, CAREF=2,
No load at P1.6/CA0 and P1.7/CA1
V
CC
= 2.2V / 3 V 0.47 0.48 0.5
V
see Figure 6 and Figure 7
PCA0=1, CARSEL=1, CAREF=3,
No load at P1 6/CA0 and P1 7/CA1;
V
CC
= 2.2 V 390 480 540
mV
V
(RefVT)
see Figure 6 and Figure 7
No load at P1.6/CA0 and P1.7/CA1;
T
A
= 85°C
V
CC
= 3 V 400 490 550
mV
V
IC
Common-mode input
voltage range
CAON=1 V
CC
= 2.2 V / 3 V 0 V
CC
−1 V
V
p
−V
S
Offset voltage See Note 2 VCC = 2.2 V / 3 V −30 30 mV
V
hys
Input hysteresis CAON = 1 V
CC
= 2.2 V / 3 V 0 0.7 1.4 mV
T
A
= 25°C,
V
CC
= 2.2 V 160 210 300
ns
t
T
A
=
25 C
,
Overdrive 10 mV, without filter: CAF = 0
V
CC
= 3 V 80 150 240
ns
t
(response
LH)
T
A
= 25°C
V
CC
= 2.2 V 1.4 1.9 3.4
s
T
A
=
25 C
Overdrive 10 mV, with filter: CAF = 1
V
CC
= 3 V 0.9 1.5 2.6
μs
T
A
= 25°C
V
CC
= 2.2 V 130 210 300
ns
t
T
A
=
25 C
Overdrive 10 mV, without filter: CAF = 0
V
CC
= 3 V 80 150 240
ns
t
(response
HL)
T
A
= 25°C,
V
CC
= 2.2 V 1.4 1.9 3.4
s
T
A
=
25 C
,
Overdrive 10 mV, with filter: CAF = 1
V
CC
= 3 V 0.9 1.5 2.6
μs
NOTES: 1. The leakage current for the Comparator_A terminals is identical to I
lkg(Px.x)
specification.
2. The input offset voltage can be cancelled by using the CAEX bit to invert the Comparator_A inputs on successive measurements.
The two successive measurements are then summed together.