Datasheet
Table Of Contents
- features
- description
- pin designation
- functional block diagram
- Terminal Functions
- short-form description
- absolute maximum ratings
- recommended operating conditions
- electrical characteristics
- supply current into AVCC + DVCC1/2 excluding external current
- SCHMITT-trigger inputs − Ports P1, P2, P3, P4, P5, and P6; RST/NMI; JTAG: TCK, TMS, TDI/TCLK, TDO/TDI
- inputs Px.x, TAx, TBx
- leakage current − Ports P1, P2, P3, P4, P5, and P6
- outputs − Ports P1, P2, P3, P4, P5, and P6
- output frequency
- wake-up LPM3
- RAM
- LCD
- Comparator_A
- POR/brownout reset (BOR)
- SVS (supply voltage supervisor/monitor)
- DCO
- crystal oscillator, LFXT1 oscillator
- crystal oscillator, XT2 oscillator
- USART0
- 12-bit ADC, power supply and input range conditions
- 12-bit ADC, external reference
- 12-bit ADC, built-in reference
- 12-bit ADC, timing parameters
- 12-bit ADC, linearity parameters
- 12-bit ADC, temperature sensor and built-in VMID
- 12-bit DAC, supply specifications
- 12-bit DAC, linearity specifications
- 12-bit DAC, output specifications
- 12-bit DAC, reference input specifications
- 12-bit DAC, dynamic specifications; Vref = VCC, DAC12IR = 1
- operational amplifier OA, supply specifications
- operational amplifier OA, input/output specifications
- operational amplifier OA, dynamic specifications
- Flash Memory
- JTAG Interface
- JTAG Fuse
- Application Information
- input/output schematic
- Port P1, P1.0 to P1.5, input/output with Schmitt-trigger
- Port P1, P1.6, P1.7, input/output with Schmitt-trigger
- port P2, P2.0, P2.4 to P2.5, input/output with Schmitt-trigger
- port P2, P2.1 to P2.3, input/output with Schmitt-trigger
- port P2, P2.6 to P2.7, input/output with Schmitt-trigger
- port P3, P3.0 to P3.3, input/output with Schmitt-trigger
- port P3, P3.4 to P3.7, input/output with Schmitt-trigger
- port P4, P4.0 to P4.5, input/output with Schmitt-trigger
- port P4, P4.6, input/output with Schmitt-trigger
- port P4, P4.7, input/output with Schmitt-trigger
- port P5, P5.0, input/output with Schmitt-trigger
- port P5, P5.1, input/output with Schmitt-trigger
- port P5, P5.2 to P5.4, input/output with Schmitt-trigger
- port P5, P5.5 to P5.7, input/output with Schmitt-trigger
- port P6, P6.0, P6.2, and P6.4, input/output with Schmitt-trigger
- port P6, P6.1, input/output with Schmitt-trigger
- port P6, P6.3, input/output with Schmitt-trigger
- port P6, P6.5, input/output with Schmitt-trigger
- port P6, P6.6, input/output with Schmitt-trigger
- port P6, P6.7, input/output with Schmitt-trigger
- VeREF+/DAC0
- JTAG pins TMS, TCK, TDI/TCLK, TDO/TDI, input/output with Schmitt-trigger or output
- JTAG fuse check mode
- input/output schematic
- Data Sheet Revision History
- Corrections to MSP430FG43x Data Sheet (SLAS380C)

MSP430FG43x
MIXED SIGNAL MICROCONTROLLER
SLAS380C − APRIL 2004 − REVISED MARCH 2011
22
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251−1443
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
SCHMITT-trigger inputs − Ports P1, P2, P3, P4, P5, and P6; RST/NMI; JTAG: TCK, TMS, TDI/TCLK, TDO/TDI
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
Positive going input threshold voltage
V
CC
= 2.2 V 1.1 1.55
V
V
IT+
Positive-going input threshold voltage
V
CC
= 3 V 1.5 1.98
V
V
Negative going input threshold voltage
V
CC
= 2.2 V 0.4 0.9
V
V
IT−
Negative-going input threshold voltage
V
CC
= 3 V 0.9 1.3
V
V
Input voltage hysteresis (V V )
V
CC
= 2.2 V 0.3 1.1
V
V
hys
Input voltage hysteresis (V
IT+
− V
IT−
)
V
CC
= 3 V 0.5 1
V
inputs Px.x, TAx, TBx
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
t
External interrupt timing
Port P1, P2: P1.x to P2.x, external trigger signal
2.2 V 62
ns
t
(int)
External interrupt timing
Port
P1,
P2:
P1.x
to
P2.x,
external
trigger
signal
for the interrupt flag, (see Note 1)
3 V 50
ns
t
Timer_A, Timer_B capture
TA0, TA1, TA2 2.2 V 62
ns
t
(cap)
Timer
_
A,
Timer
_
B
capture
timing
TB0, TB1, TB2
3 V 50
ns
f
(TAext)
Timer_A, Timer_B clock
frequency externally applied
TACLK TBCLK INCLK: t =t
2.2 V 8
MHz
f
(TBext)
frequency externally applied
to pin
TACLK, TBCLK, INCLK: t
(H)
= t
(L)
3 V 10
MHz
f
(TAint)
Timer_A, Timer_B clock
SMCLK or ACLK signal selected
2.2 V 8
MHz
f
(TBint)
Timer
_
A,
Timer
_
B
clock
frequency
SMCLK or ACLK signal selected
3 V 10
MHz
NOTES: 1. The external signal sets the interrupt flag every time the minimum t
(int)
parameters are met. It may be set even with trigger signals
shorter than t
(int)
.
leakage current − Ports P1, P2, P3, P4, P5, and P6 (see Note 1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
lkg(Px.y)
Leakage
current
Port Px V
(Px.y)
(see Note 2) V
CC
= 2.2 V/3 V ±50 nA
NOTES: 1. The leakage current is measured with V
SS
or V
CC
applied to the corresponding pin(s), unless otherwise noted.
2. The port pin must be selected as input.