Datasheet
Table Of Contents
- features
- description
- Available Options
- pin designation, DL package
- pin designation, RGZ package
- functional block diagram
- Terminal Functions
- short-form description
- absolute maximum ratings
- recommended operating conditions
- electrical characteristics
- supply current into AVCC + DVCC excluding external current
- Schmitt-trigger inputs − Ports P1, P2, P5, and P6; RST/NMI; JTAG: TCK, TMS, TDI/TCLK, TDO/TDI
- inputs Px.x, TAx
- leakage current − Ports P1, P2, P5, and P6
- outputs − Ports P1, P2, P5, and P6
- output frequency
- wake-up LPM3
- RAM
- LCD_A
- POR/brownout reset (BOR)
- DCO
- crystal oscillator, LFXT1 oscillator
- SD16_A, power supply and recommended operating conditions
- SD16_A, input range
- SD16_A, performance
- SD16_A, temperature sensor
- SD16_A, built-in voltage reference
- SD16_A, reference output buffer
- SD16_A, external reference input
- 12-bit DAC, supply specifications
- 12-bit DAC, linearity specifications
- 12-bit DAC, output specifications
- 12-bit DAC, reference input specifications
- 12-bit DAC, dynamic specifications
- operational amplifier OA, supply specifications
- operational amplifier OA, input/output specifications
- operational amplifier OA, dynamic specifications
- switches to ground
- flash memory
- JTAG interface
- JTAG fuse
- input/output schematics
- Port P1 pin schematic: P1.0, P1.1, input/output with Schmitt−trigger
- Port P1 pin schematic: P1.2, input/output with Schmitt−trigger and analog functions
- Port P1 pin schematic: P1.3, P1.5, P1.7, input/output with Schmitt−trigger and analog functions
- Port P1 pin schematic: P1.4, input/output with Schmitt−trigger and analog functions
- Port P1 pin schematic: P1.6, input/output with Schmitt−trigger and analog functions
- Port P2 pin schematic: P2.0 to P2.1, input/output with Schmitt−trigger, LCD and analog functions
- Port P2 pin schematic: P2.2 to P2.7, input/output with Schmitt−trigger, LCD and analog functions
- Port P5 pin schematic: P5.0, P5.1, P5.5 to P5.7, input/output with Schmitt−trigger and LCDfunctions
- Port P5 pin schematic: P5.2 to P5.4, input/output with Schmitt−trigger and LCD functions
- Port P6 pin schematic: P6.0, P6.2, input/output with Schmitt−trigger and analog functions
- Port P6 pin schematic: P6.1, P6.3, input/output with Schmitt−trigger and analog functions
- Port P6 pin schematic: P6.4 to P6.7, input/output with Schmitt−trigger and analog functions
- JTAG pins TMS, TCK, TDI/TCLK, TDO/TDI, input/output with Schmitt-trigger or output
- JTAG fuse check mode
- Data Sheet Revision History
MSP430FG42x0
MIXED SIGNAL MICROCONTROLLER
SLAS556A − JULY 2007 − REVISED AUGUST 2007
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
pin designation, DL package
P5.4/COM3
P5.3/COM2
P5.2/COM1
COM0
P2.0/S13/SW0C
P2.1/S12/SW1C
P2.2/S11
P2.3/S10
P2.4/S9
P2.5/S8
P2.6/S7
P2.7/S6
S5
P5.7/S4
P5.6/S3
P5.5/S2
P5.0/S1
P5.1/S0
LCDCAP/R23
LCDREF/R13
P1.0/TA0
P1.1/TA0/MCLK
P1.2/TA1/A4−
P1.3/TA2/A4+
TDO/TDI
TDI/TCLK
TMS
TCK
RST
/NMI
DV
CC
DV
SS
XIN
XOUT
AV
SS
AV
CC
V
REF
P6.0/A0+/OA0O
P6.1/A0−/OA0FB
P6.2/A1+/OA1O
P6.3/A1−/OA1FB
P6.4/OA0I1
P6.5/OA0I2
P6.6/OA1I1
P6.7/OA1I2
P1.7/A2+
P1.6/A2−/OA0I0
P1.5/TACLK/ACLK/A3+
P1.4/A3−/OA1I0/DAC0
DL PACKAGE
(TOP VIEW)
MSP430FG42x0IDL
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
32
31
30
29
28
27
26
25