Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 64 (10x10) 16-Bit 8.4 MHz I/O number 14

MSP430FE42xA

MIXED SIGNAL MICROCONTROLLER

SLAS588 -- FEBRUARY 2008

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Low Supply-Voltage Range, 2.7 V to 3.6 V

D Ultra-Low Power Consumption:

-- Active Mode: 400 μAat1MHz,3.0V

-- Standby Mode: 1.6 μA

-- Off Mode (RAM Retention): 0.1 μA

D Five Power-Saving Modes

D Wake-Up From Standby Mode in Less

Than 6 μs

D Frequency-Locked Loop, FLL+

D 16-Bit RISC Architecture, 125-ns

Instruction Cycle Time

D Embedded Signal Processing for

Single-Phase Energy Metering With

Integrated Analog Front-End and

Temperature Sensor (ESP430CE1A)

D 16-Bit Timer_A With Three

Capture/Compare Registers

D Integrated LCD Driver for 128 Segments

D Serial Communication Interface (USART),

Asynchronous UART or Synchronous SPI

Selectable by Software

D Brownout Detector

D Supply Voltage Supervisor/Monitor With

Programmable Level Detection

D Serial Onboard Programming,

No External Programming Voltage Needed,

Programmable Code Protection by Security

Fuse

D Bootstrap Loader in Flash Devices

D Family Members Include:

-- MSP430FE423A:

8KB + 256B Flash Memory,

256B RAM

-- MSP430FE425A:

16KB + 256B Flash Memory,

512B RAM

-- MSP430FE427A:

32KB + 256B Flash Memory,

1KB RAM

D Availablein64-PinQuadFlatPack(QFP)

D For Complete Module Descriptions, Refer

to the MSP430x4xx Family User’s Guide,

Literature Number SLAU056

description

The Texas Instruments MSP430 family of ultra-low-power microcontrollers consist of several devices featuring

different sets of peripherals targeted for various applications. The architecture, combined with five low power

modes, is optimized to achieve extended battery life in portable measurement applications. The device features

a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code

efficiency. The digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in less

than 6 μs.

The MSP430FE42xA series are microcontroller configurations with three independent 16-bit sigma-delta A/D

converters and embedded signal processor core used to measure and calculate single-phase energy in both

2-wire and 3-wire configurations. Also included are a built-in 16-bit timer, 128 LCD segment drive capability, and

14 I/O pins.

Typical applications include 2-wire and 3-wire single-phase metering including tamper-resistant meter

implementations.

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range

from subtle performance degradation to c omplete device failure. Precision integrated circuits may be more s usceptible to damage

because very small parametric changes could cause the device not to meet its published specifications. These devices have limited

built-in ESD protection.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Summary of content (49 pages)

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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 D Low Supply-Voltage Range, 2.7 V to 3.6 V D Ultra-Low Power Consumption: D D D D D D D D -- Active Mode: 400 μA at 1 MHz, 3.0 V -- Standby Mode: 1.6 μA -- Off Mode (RAM Retention): 0.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 AVAILABLE OPTIONS PACKAGED DEVICES TA PLASTIC 64-PIN QFP (PM) MSP430FE423AIPM MSP430FE425AIPM MSP430FE427AIPM --40°C to 85°C AVCC DVSS AVSS P2.3/SVSIN P2.4/UTXD0 P2.5/URXD0 RST/NMI TCK TMS TDI/TCLK TDO/TDI P1.0/TA0 P1.1/TA0/MCLK P1.2/TA1/S31 P1.3/SVSOUT/S30 P1.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 functional block diagram DVCC XIN XOUT Oscillators FLL+ Emulation Module AVCC AVSS P1 P2 8 6 ACLK SMCLK MCLK 8 MHz CPU incl.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION DVCC 1 I1+ 2 I Digital supply voltage, positive terminal. Current 1 positive analog input. Internal connection to SD16 Channel 0 A0+. (see Note 1) I1 -- 3 I Current 1 negative analog input. I2+ 4 I Current 2 positive analog input. Internal connection to SD16 Channel 1 A0+. (see Note 1) I2 -- 5 I Current 2 negative analog input.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 Terminal Functions (Continued) TERMINAL NAME NO. R13 41 R23 R33 I/O DESCRIPTION I Input of third most positive analog LCD level (V4 or V3) 42 I Input of second most positive analog LCD level (V2) 43 O Output of most positive analog LCD level (V1) P2.1/UCLK0/S24 44 I/O General-purpose digital I/O / external clock input-USART0/UART or SPI mode, clock output—USART0/SPI mode / LCD segment output 24 (See Note 1) P2.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 short-form description CPU The MSP430 CPU has a 16-bit RISC architecture that is highly transparent to the application. All operations, other than program-flow instructions, are performed as register operations in conjunction with seven addressing modes for source operand and four addressing modes for destination operand.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 operating modes The MSP430 has one active mode and five software selectable low-power modes of operation. An interrupt event can wake up the device from any of the five low-power modes, service the request, and restore back to the low-power mode on return from the interrupt program. The following six operating modes can be configured by software: D Active mode (AM) -- All clocks are active. D Low-power mode 0 (LPM0) -- CPU is disabled.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 interrupt vector addresses The interrupt vectors and the power-up starting address are located in the address range of 0FFFFh to 0FFE0h. The vector contains the 16-bit address of the appropriate interrupt-handler instruction sequence.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 special function registers Most interrupt and module enable bits are collected into the lowest address space. Special function register bits that are not allocated to a functional purpose are not physically present in the device. Simple software access is provided with this arrangement.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 module enable registers 1 and 2 7 UTXE0 Address 04h rw–0 6 URXE0 USPIE0 5 4 3 1 2 1 0 rw–0 URXE0: USART0: UART mode receive enable UTXE0: USART0: UART mode transmit enable USPIE0: USART0: SPI mode transmit and receive enable Address 2 7 6 5 4 3 0 05h Legend: rw--0,1: rw--(0,1): Bit Can Be Read and Written. It Is Reset or Set by PUC. Bit Can Be Read and Written. It Is Reset or Set by POR.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 flash memory The flash memory can be programmed via the JTAG port, the bootstrap loader, or in-system by the CPU. The CPU can perform single-byte and single-word writes to the flash memory. Features of the flash memory include: D Flash memory has n segments of main memory and two segments of information memory (A and B) of 128 bytes each. Each segment in main memory is 512 bytes in size.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 peripherals Peripherals are connected to the CPU through data, address, and control busses and can be handled using all instructions. For complete module descriptions, refer to the MSP430x4xx Family User’s Guide, literature number SLAU056.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 WDT+ watchdog timer The primary function of the watchdog timer (WDT+) module is to perform a controlled system restart after a software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog function is not needed in an application, the module can be configured as an interval timer and can generate interrupts at selected time intervals.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 peripheral file map PERIPHERALS WITH WORD ACCESS Watchdog Watchdog timer control WDTCTL 0120h Timer_A3 _ Timer_A interrupt vector TAIV 012Eh Timer_A control TACTL 0160h Capture/compare control 0 TACCTL0 0162h Capture/compare control 1 TACCTL1 0164h Capture/compare control 2 TACCTL2 0166h Reserved 0168h Reserved 016Ah Reserved 016Ch Reserved 016Eh Timer_A register TAR 0170h Capture/compare register 0 TACCR0 0
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 peripheral file map (continued) PERIPHERALS WITH WORD ACCESS SD16 (continued, see Note 1) ESP430 (ESP430CE1A) ( ) Channel 1 conversion memory SD16MEM1 0114h Channel 2 conversion memory SD16MEM2 0116h Reserved 0118h Reserved 011Ah Reserved 011Ch Reserved 011Eh ESP430 control ESPCTL 0150h Mailbox control MBCTL 0152h Mailbox in 0 MBIN0 0154h Mailbox in 1 MBIN1 0156h Mailbox out 0 MBOUT0 0158h Mailbox out 1 MBOUT
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 peripheral file map (continued) PERIPHERALS WITH BYTE ACCESS (CONTINUED) USART0 Transmit buffer U0TXBUF 077h Receive buffer U0RXBUF 076h Baud rate U0BR1 075h Baud rate U0BR0 074h Modulation control U0MCTL 073h Receive control U0RCTL 072h Transmit control U0TCTL 071h USART control U0CTL 070h Brownout, SVS SVS control register SVSCTL 056h FLL+ Clock FLL+ control 1 FLL_CTL1 054h FLL+ control 0 FLL_CTL0 053h
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 absolute maximum ratings† Voltage applied at VCC to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . --0.3 V to + 4.1 V Voltage applied to any pin (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . --0.3 V to VCC + 0.3 V Diode current at any device terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) supply current into AVCC + DVCC excluding external current (see Note 1) PARAMETER TEST CONDITIONS VCC I(AM) Active mode, f(MCLK) = f(SMCLK) = f(DCO) = 1 MHz, f(ACLK) = 32,768 Hz, XTS_FLL = 0 (program executes in flash) TA = --40°C to 85°C I(LPM0) Low-power mode, (LPM0/LPM1) f(MCLK) = f(SMCLK) = f(DCO) = 1 MHz, f(ACLK) = 32,768 Hz, XTS_
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) Schmitt-trigger inputs -- Ports P1 and P2, RST/NMI, JTAG (TCK, TMS, TDI/TCLK, TDO/TDI) VCC MIN MAX UNIT VIT+ Positive-going input threshold voltage PARAMETER 3V 1.5 TYP 1.98 V VIT-- Negative-going input threshold voltage 3V 0.9 1.3 V Vhys Input voltage hysteresis (VIT+ -- VIT-- ) 3V 0.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) outputs -- Ports P1 and P2 (continued) TYPICAL LOW-LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE TYPICAL LOW-LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE 50 VCC = 2.2 V P2.1 25 TA = 25°C I OL -- Typical Low-level Output Current -- mA I OL -- Typical Low-level Output Current -- mA 30 TA = 85°C 20 15 10 5 0 0.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) wake-up LPM3 PARAMETER TEST CONDITIONS VCC MIN TYP MAX f = 1 MHz td(LPM3) f = 2 MHz Delay time UNIT 6 6 3V f = 3 MHz μs 6 RAM (see Note 1) PARAMETER TEST CONDITIONS VRAMh MIN CPU halted (see Note 1) TYP MAX 1.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) VCC Vhys(B_IT--) V(B_IT--) VCC(start) 1 0 td(BOR) Figure 6. POR/Brownout Reset (BOR) vs Supply Voltage VCC VCC (drop) -- V 2 1.5 tpw 3V V cc = 3 V Typical Conditions 1 VCC(drop) 0.5 0 0.001 1 1000 1 ns tpw -- Pulse Width -- μs 1 ns tpw -- Pulse Width -- μs Figure 7.
PAGE 23
MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) SVS (supply voltage supervisor/monitor) (see Note 1) PARAMETER t(SVSR)4 TEST CONDITIONS MIN dVCC/dt > 30 V/ms (see Figure 9) 5 MAX 150 dVCC/dt ≤ 30 V/ms 2000 td(SVSon) SVSon, switch from VLD = 0 to VLD ≠ 0, VCC = 3 V tsettle VLD ≠ 0‡ V(SVSstart) VLD ≠ 0, VCC/dt ≤ 3 V/s (see Figure 9) 20 1.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) VCC V Software Sets VLD>0: SVS is Active Vhys(SVS_IT--) (SVS_IT--) V(SVSstart) V(B_IT--) Vhys(B_IT--) VCC(start) Brownout Brownout Region Brownout Region 1 0 td(BOR) SVS out 1 0 td(SVSon) Set POR 1 td(BOR) SVS Circuit is Active From VLD > to VCC < V(B_IT--) td(SVSR) Undefined 0 Figure 9.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) DCO PARAMETER VCC MIN TYP MAX UNIT f(DCOCLK) N(DCO) = 01Eh, FN_8 = FN_4 = FN_3 = FN_2 = 0, D = 2; DCOPLUS = 0, fCrystal = 32.768 kHz 3V f(DCO = 2) FN_8 = FN_4 = FN_3 = FN_2 = 0 , DCOPLUS = 1 3V 0.3 0.7 1.3 MHz f(DCO = 27) FN_8 = FN_4 = FN_3 = FN_2 = 0, DCOPLUS = 1 3V 2.7 6.1 11.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 Sn - Stepsize Ratio Between DCO Taps electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) 1.17 Max 1.11 1.07 1.06 Min 1 20 27 DCO Tap Figure 12.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) crystal oscillator, LFXT1 oscillator (see Notes 1 and 2) PARAMETER CXIN CXOUT VIL VIH Integrated inp inputt capacitance (see Note 4) Integrated o output tp t capacitance (see Note 4) Inp t le Input levels els at XIN TEST CONDITIONS VCC MIN TYP OSCCAPx = 0h 3V 0 OSCCAPx = 1h 3V 10 OSCCAPx = 2h 3V 14 OSCCAPx = 3h
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) ESP430CE1A, SD16 and ESP430 power supply and recommended operating conditions PARAMETER AVCC IESP430 Analog supply voltage Total digital and analog supply current when ESP430 and SD16 active i (IAVCC + IDVCC) ISD16 Analog supply current: 1 active SD16 channel including internal reference (ESP430 disabled) fMAINS Mains frequ
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) ESP430CE1A, SD16 performance (fSD16 = 1 MHz, SD16OSRx = 256, SD16REFON = 1) PARAMETER Signal to noise + Signal-to-noise distortion ratio SINAD G Nominal gain EOS Offset error dEOS/dT Offset error temperature coefficient Common mode Common-mode rejection ratio CMRR AC PSRR AC power supply rejection ratio XT Crosstalk
PAGE 30
MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) ESP430CE1A, SD16 built-in voltage reference PARAMETER TEST CONDITIONS VCC VREF Internal reference voltage SD16REFON = 1, SD16VMIDON = 0 3V IREF Reference supply current SD16REFON = 1, SD16VMIDON = 0 TC Temperature coefficient SD16REFON = 1, SD16VMIDON = 0 (see Note 1) CREF VREF load capacitance SD16REFON = 1, SD16VM
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) ESP430CE1A, active energy measurement test conditions and accuracy, TA = 25°C (See Note 1) D fACLK = 32,768 Hz (watch crystal) D fMCLK = 4.194MHz (FLL+) D fSD16 = fMCLK/4 = 1.049MHz D Single point calibration at I = 10 A, PF = 0.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 ESP430CE1A (I1 SD16GAINx = 1) typical characteristics (see Note A) MEASUREMENT ERROR AS % OF READING (TA = 25°C) 1.00 0.75 fMAINS = 50 Hz VLINE = 230 V 0.50 PF = 0.5 lag Error -- % 0.25 PF = 1 0.00 --0.25 PF = 0.8 lead --0.50 --0.75 --1.00 0.01 0.10 1.00 10.00 100.00 Line Current -- A Figure 15 MEASUREMENT ERROR AS % OF READING (TA = --40°C) 1.00 0.75 MEASUREMENT ERROR AS % OF READING (TA = 85°C) 1.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) flash memory TEST CONDITIONS PARAMETER VCC(PGM/ ERASE) VCC Program and erase supply voltage MIN NOM 2.7 fFTG Flash timing generator frequency IPGM Supply current from DVCC during program 257 IERASE Supply current from DVCC during erase tCPT Cumulative program time see Note 1 2.7 V/ 3.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 APPLICATION INFORMATION input/output schematic Port P1, P1.0 to P1.1, input/output with Schmitt trigger Pad Logic CAPD.x P1SEL.x 0: Input 1: Output 0 P1DIR.x Direction Control From Module P1OUT.x 1 0 1 Module X OUT Bus keeper P1.0/TA0 P1.1/TA0/MCLK P1IN.x EN D Module X IN P1IE.x P1IRQ.x P1IFG.x Q EN Set Interrupt Edge Select P1IES.x P1SEL.x NOTE: 0 ≤ x ≤ 1. Port Function is Active if CAPD.x = 0 † 34 PnSEL.x PnDIR.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 APPLICATION INFORMATION input/output schematic (continued) Port P1, P1.2 to P1.7, input/output with Schmitt trigger Pad Logic Port/LCD Segment xx DVSS P1SEL.x 0: Input 1: Output 0 P1DIR.x Direction Control From Module P1OUT.x 1 0 1 Module X OUT Bus keeper P1.2/TA1/S31 P1.3/SVSOUT/S30 P1.4/S29 P1.5/TACLK/ACLK/S28 P1.6/SIMO0/S27 P1.7/SOMI0/S26 P1IN.x EN D Module X IN P1IE.x P1IRQ.x P1IFG.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 APPLICATION INFORMATION input/output schematic (continued) Port P2, P2.0 to P2.1, input/output with Schmitt trigger 0: Port active 1: Segment xx function active Pad Logic Port/LCD Segment xx P2SEL.x 0: Input 1: Output 0 P2DIR.x Direction Control From Module 1 0 P2OUT.x 1 Module X OUT Bus Keeper P2.0/TA2/S25 P2.1/UCLK0/S24 P2IN.x EN Module X IN D P2IE.x P2IRQ.x P2IFG.x EN Q Set P2IES.x NOTE: 0 ≤ x ≤ 1.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 APPLICATION INFORMATION input/output schematic (continued) Port P2, P2.2 to P2.5, input/output with Schmitt trigger To BrownOut/SVS for P2.3/SVSIN Pad Logic DVSS DVSS CAPD.x P2SEL.x 0: Input 1: Output 0 P2DIR.x Direction Control From Module P2OUT.x 1 0 1 Module X OUT Bus keeper P2.2/STE0 P2.3/SVSIN P2.4/UTXD0 P2.5/URXD0 P2IN.x EN D Module X IN P2IE.x P2IRQ.x P2IFG.x Q EN Set Interrupt Edge Select P2IES.x P2SEL.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 APPLICATION INFORMATION input/output schematic (continued) Port P2, unbonded GPIOs P2.6 and P2.7 P2SEL.x 0: Input 1: Output 0 P2DIR.x 1 Direction Control From Module 0 P2OUT.x 1 Module X OUT P2IN.x Node Is Reset With PUC EN Module X IN P2IRQ.x Bus Keeper D P2IE.x P2IFG.x PUC Interrupt Edge Select EN Q Set Interrupt Flag P2IES.x P2SEL.x NOTE: x = Bit/identifier, 6 to 7 for port P2 without external pins P2Sel.x P2DIR.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 APPLICATION INFORMATION JTAG pins (TMS, TCK, TDI/TCLK, TDO/TDI), input/output with Schmitt trigger or output TDO Controlled by JTAG Controlled by JTAG TDO/TDI JTAG Controlled by JTAG DVCC TDI Burn and Test Fuse TDI/TCLK Test and Emulation DVCC TMS Module TMS DVCC TCK TCK RST/NMI Tau ~ 50 ns Brownout TCK POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 G D U S G D U S 39
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 APPLICATION INFORMATION JTAG fuse check mode MSP430 devices that have the fuse on the TDI/TCLK terminal have a fuse check mode that tests the continuity of the fuse the first time the JTAG port is accessed after a power-on reset (POR). When activated, a fuse check current, ITF, of 1.8 mA at 3 V can flow from the TDI/TCLK pin to ground if the fuse is not burned.
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MSP430FE42xA MIXED SIGNAL MICROCONTROLLER SLAS588 -- FEBRUARY 2008 Data Sheet Revision History Literature Number SLAS588 Summary Production data sheet release NOTE: The referring page and figure numbers are referred to the respective document revision.
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Manual Update Sheet SLAZ563 – December 2013 Corrections to MSP430FE42xA Data Sheet (SLAS588) Document Being Updated: MSP430FE42xA Mixed Signal Microcontroller Literature Number Being Updated: SLAS588 Page Change or Add 35 In the table for "Port P1, P1.2 to P1.7, input/output with Schmitt trigger": Port/LCD (the column heading) should be changed to Port/LCD. 0: LCDM < 0E0h, 1: LCDM ≥ 0E0h should be changed to 0: LCDPx < 05h, 1: LCDPx ≥ 05h.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant MSP430FE423AIPMR LQFP PM 64 1000 330.0 24.4 13.0 13.0 2.1 16.0 24.0 Q2 MSP430FE423AIPMR LQFP PM 64 1000 330.0 24.4 13.0 13.0 2.1 16.0 24.0 Q2 MSP430FE425AIPMR LQFP PM 64 1000 330.0 24.4 13.0 13.0 2.1 16.0 24.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) MSP430FE423AIPMR LQFP PM 64 1000 367.0 367.0 45.0 MSP430FE423AIPMR LQFP PM 64 1000 336.6 336.6 41.3 MSP430FE425AIPMR LQFP PM 64 1000 336.6 336.6 41.3 MSP430FE425AIPMR LQFP PM 64 1000 367.0 367.0 45.0 MSP430FE427AIPMR LQFP PM 64 1000 367.0 367.0 45.0 MSP430FE427AIPMR LQFP PM 64 1000 336.6 336.
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MECHANICAL DATA MTQF008A – JANUARY 1995 – REVISED DECEMBER 1996 PM (S-PQFP-G64) PLASTIC QUAD FLATPACK 0,27 0,17 0,50 0,08 M 33 48 49 32 64 17 0,13 NOM 1 16 7,50 TYP Gage Plane 10,20 SQ 9,80 12,20 SQ 11,80 0,25 0,05 MIN 0°– 7° 0,75 0,45 1,45 1,35 Seating Plane 0,08 1,60 MAX 4040152 / C 11/96 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.