Datasheet

MSP430F673x
MSP430F672x
www.ti.com SLAS731C –DECEMBER 2011–REVISED FEBRUARY 2013
Output Frequency – General Purpose I/O
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN MAX UNIT
V
CC
= 1.8 V
16
PMMCOREVx = 0
Port output frequency
f
Px.y
See
(1)(2)
MHz
(with load)
V
CC
= 3 V
25
PMMCOREVx = 3
V
CC
= 1.8 V
ACLK
16
PMMCOREVx = 0
SMCLK
f
Port_CLK
Clock output frequency MHz
MCLK
V
CC
= 3 V
25
C
L
= 20 pF
(2)
PMMCOREVx = 3
(1) A resistive divider with 2 × R1 between V
CC
and V
SS
is used as load. The output is connected to the center tap of the divider. For full
drive strength, R1 = 550 Ω. For reduced drive strength, R1 = 1.6 kΩ. C
L
= 20 pF is connected to the output to V
SS
.
(2) The output voltage reaches at least 10% and 90% V
CC
at the specified toggle frequency.
Crystal Oscillator, XT1, Low-Frequency Mode
(1)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
f
OSC
= 32768 Hz, XTS = 0, XT1BYPASS = 0,
0.075
XT1DRIVEx = 1, T
A
= 25°C
Differential XT1 oscillator
crystal current consumption f
OSC
= 32768 Hz, XTS = 0, XT1BYPASS = 0,
ΔI
DVCC.LF
3.0 V 0.170 µA
from lowest drive setting, LF XT1DRIVEx = 2, T
A
= 25°C
mode
f
OSC
= 32768 Hz, XTS = 0, XT1BYPASS = 0,
0.290
XT1DRIVEx = 3, T
A
= 25°C
XT1 oscillator crystal
f
XT1,LF0
XTS = 0, XT1BYPASS = 0 32768 Hz
frequency, LF mode
XT1 oscillator logic-level
f
XT1,LF,SW
square-wave input frequency, XTS = 0, XT1BYPASS = 1
(2) (3)
10 32.768 50 kHz
LF mode
XTS = 0, XT1BYPASS = 0, XT1DRIVEx = 0,
210
f
XT1,LF
= 32768 Hz, C
L,eff
= 6 pF
Oscillation allowance for
OA
LF
kΩ
LF crystals
(4)
XTS = 0, XT1BYPASS = 0, XT1DRIVEx = 1,
300
f
XT1,LF
= 32768 Hz, C
L,eff
= 12 pF
XTS = 0, XCAPx = 0
(6)
2
XTS = 0, XCAPx = 1 5.5
Integrated effective load
C
L,eff
pF
capacitance, LF mode
(5)
XTS = 0, XCAPx = 2 8.5
XTS = 0, XCAPx = 3 12.0
(1) To improve EMI on the XT1 oscillator, the following guidelines should be observed.
(a) Keep the trace between the device and the crystal as short as possible.
(b) Design a good ground plane around the oscillator pins.
(c) Prevent crosstalk from other clock or data lines into oscillator pins XIN and XOUT.
(d) Avoid running PCB traces underneath or adjacent to the XIN and XOUT pins.
(e) Use assembly materials and praxis to avoid any parasitic load on the oscillator XIN and XOUT pins.
(f) If conformal coating is used, ensure that it does not induce capacitive/resistive leakage between the oscillator pins.
(2) When XT1BYPASS is set, XT1 circuits are automatically powered down. Input signal is a digital square wave with parametrics defined in
the Schmitt-trigger Inputs section of this datasheet.
(3) Maximum frequency of operation of the entire device cannot be exceeded.
(4) Oscillation allowance is based on a safety factor of 5 for recommended crystals. The oscillation allowance is a function of the
XT1DRIVEx settings and the effective load. In general, comparable oscillator allowance can be achieved based on the following
guidelines, but should be evaluated based on the actual crystal selected for the application:
(a) For XT1DRIVEx = 0, C
L,eff
≤ 6 pF.
(b) For XT1DRIVEx = 1, 6 pF ≤ C
L,eff
≤ 9 pF.
(c) For XT1DRIVEx = 2, 6 pF ≤ C
L,eff
≤ 10 pF.
(d) For XT1DRIVEx = 3, C
L,eff
≥ 6 pF.
(5) Includes parasitic bond and package capacitance (approximately 2 pF per pin).
Since the PCB adds additional capacitance, it is recommended to verify the correct load by measuring the ACLK frequency. For a
correct setup, the effective load capacitance should always match the specification of the used crystal.
(6) Requires external capacitors at both terminals. Values are specified by crystal manufacturers.
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