Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 80 (12x12) 16-Bit 25 MHz I/O number 52

MSP430F673x

MSP430F672x

SLAS731C –DECEMBER 2011–REVISED FEBRUARY 2013

www.ti.com

Table 15. Default Mapping

PIN NAME

PxMAPy MNEMONIC INPUT PIN FUNCTION OUTPUT PIN FUNCTION

PZ PN

P1.0/PM_TA0.0/ P1.0/PM_TA0.0/

PM_TA0.0 TA0 CCR0 capture input CCI0A TA0 CCR0 compare output Out0

VeREF-/A2 VeREF-/A2

P1.1/PM_TA0.1/ P1.1/PM_TA0.1/

PM_TA0.1 TA0 CCR1 capture input CCI1A TA0 CCR1 compare output Out1

VeREF+/A1 VeREF+/A1

eUSCI_A0 UART RXD

P1.2/PM_UCA0RXD/ P1.2/PM_UCA0RXD/ PM_UCA0RXD, (direction controlled by eUSCI – input),

PM_UCA0SOMI/A0 PM_UCA0SOMI/A0 PM_UCA0SOMI eUSCI_A0 SPI slave out master in

(direction controlled by eUSCI)

eUSCI_A0 UART TXD

P1.3/PM_UCA0TXD/ P1.3/PM_UCA0TXD/ PM_UCA0TXD, (direction controlled by eUSCI – output),

PM_UCA0SIMO/R03 PM_UCA0SIMO/R03 PM_UCA0SIMO eUSCI_A0 SPI slave in master out

(direction controlled by eUSCI)

eUSCI_A1 UART RXD

P1.4/PM_UCA1RXD/ P1.4/PM_UCA1RXD/

PM_UCA1RXD, (direction controlled by eUSCI – input),

PM_UCA1SOMI/ PM_UCA1SOMI/

PM_UCA1SOMI eUSCI_A1 SPI slave out master in

LCDREF/R13 LCDREF/R13

(direction controlled by eUSCI)

eUSCI_A1 UART TXD

P1.5/PM_UCA1TXD/ P1.5/PM_UCA1TXD/ PM_UCA1TXD, (direction controlled by eUSCI – output),

PM_UCA1SIMO/R23 PM_UCA1SIMO/R23 PM_UCA1SIMO eUSCI_A1 SPI slave in master out

(direction controlled by eUSCI)

P1.6/PM_UCA0CLK/ P1.6/PM_UCA0CLK/

PM_UCA0CLK eUSCI_A0 clock input/output (direction controlled by eUSCI)

COM4 COM4

P1.7/PM_UCB0CLK/ P1.7/PM_UCB0CLK/

PM_UCB0CLK eUSCI_B0 clock input/output (direction controlled by eUSCI)

COM5 COM5

eUSCI_B0 SPI slave out master in

P2.0/PM_UCB0SOMI/ P2.0/PM_UCB0SOMI/ PM_UCB0SOMI, (direction controlled by eUSCI),

PM_UCB0SCL/COM6 PM_UCB0SCL/COM6/S39 PM_UCB0SCL eUSCI_B0 I2C clock

(open drain and direction controlled by eUSCI)

eUSCI_B0 SPI slave in master out

P2.1/PM_UCB0SIMO/ P2.1/PM_UCB0SIMO/ PM_UCB0SIMO, (direction controlled by eUSCI),

PM_UCB0SDA/COM7 PM_UCB0SDA/COM7/S38 PM_UCB0SDA eUSCI_B0 I2C data

(open drain and direction controlled by eUSCI)

eUSCI_A2 UART RXD

P2.2/PM_UCA2RXD/ P2.2/PM_UCA2RXD/ PM_UCA2RXD, (direction controlled by eUSCI – input),

PM_UCA2SOMI PM_UCA2SOMI/S37 PM_UCA2SOMI eUSCI_A2 SPI slave out master in

(direction controlled by eUSCI)

eUSCI_A2 UART TXD

P2.3/PM_UCA2TXD/ P2.3/PM_UCA2TXD/ PM_UCA2TXD, (direction controlled by eUSCI – output),

PM_UCA2SIMO PM_UCA2SIMO/S36 PM_UCA2SIMO eUSCI_A2 SPI slave in master out

(direction controlled by eUSCI)

P2.4/PM_UCA1CLK P2.4/PM_UCA1CLK/S35 PM_UCA1CLK eUSCI_A1 clock input/output (direction controlled by eUSCI)

P2.5/PM_UCA2CLK P2.5/PM_UCA2CLK/S34 PM_UCA2CLK eUSCI_A2 clock input/output (direction controlled by eUSCI)

P2.6/PM_TA1.0 P2.6/PM_TA1.0/S33 PM_TA1.0 TA1 CCR0 capture input CCI0A TA1 CCR0 compare output Out0

P2.7/PM_TA1.1 P2.7/PM_TA1.1/S32 PM_TA1.1 TA1 CCR1 capture input CCI1A TA1 CCR1 compare output Out1

P3.0/PM_TA2.0 P3.0/PM_TA2.0/S31 PM_TA2.0 TA2 CCR0 capture input CCI0A TA2 CCR0 compare output Out0

P3.1/PM_TA2.1 P3.1/PM_TA2.1/S30 PM_TA2.1 TA2 CCR1 capture input CCI1A TA2 CCR1 compare output Out1

P3.2/PM_TACLK/ P3.2/PM_TACLK/ PM_TACLK, Timer_A clock input to

RTC_C clock output

PM_RTCCLK PM_RTCCLK/S29 PM_RTCCLK TA0, TA1, TA2, TA3

P3.3/PM_TA0.2 P3.3/PM_TA0.2/S28 PM_TA0.2 TA0 CCR2 capture input CCI2A TA0 CCR2 compare output Out2

SD24_B bit stream clock input/output

P3.4/PM_SDCLK/S39 P3.4/PM_SDCLK/S27 PM_SDCLK

(direction controlled by SD24_B)

SD24_B converter-0 bit stream data input/output

P3.5/PM_SD0DIO/S38 P3.5/PM_SD0DIO/S26 PM_SD0DIO

(direction controlled by SD24_B)

SD24_B converter-1 bit stream data input/output

P3.6/PM_SD1DIO/S37 P3.6/PM_SD1DIO/S25 PM_SD1DIO

(direction controlled by SD24_B)

SD24_B converter-2 bit stream data input/output

P3.7/PM_SD2DIO/S36 P3.7/PM_SD2DIO/S24 PM_SD2DIO

(direction controlled by SD24_B)