Datasheet

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MSP430F673x

MSP430F672x

SLAS731C –DECEMBER 2011–REVISED FEBRUARY 2013

www.ti.com

DESCRIPTION

The Texas Instruments MSP430 family of ultra-low-power microcontrollers consists of several devices featuring

different sets of peripherals targeted for various applications. The architecture, combined with extensive low-

power modes, is optimized to achieve extended battery life in portable measurement applications. The device

features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code

efficiency. The digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in 3 µs

(typical).

The MSP430F67xx series are microcontroller configurations with three high-performance 24-bit sigma-delta A/D

converters, a 10-bit analog-to-digital (A/D) converter, four enhanced universal serial communication interfaces

(three eUSCI_A and one eUSCI_B), four 16-bit timers, hardware multiplier, DMA, real-time clock module with

alarm capabilities, LCD driver with integrated contrast control, auxiliary supply system, and up to 72 I/O pins in

100-pin devices and 52 I/O pins in 80-pin devices.

Typical applications for these devices are 2-wire and 3-wire single-phase metering, including tamper-resistant

meter implementations.

Family members available are summarized in Table 1.

Table 1. Family Members

eUSCI

Flash SRAM SD24_B ADC10_A Package

Channel A: Channel B:

Device Timer_A

(1)

I/O

(KB) (KB) Converters Channels Type

UART, IrDA,

SPI, I

SPI

MSP430F6736IPZ 128 8 3 6 ext, 2 int 3, 2, 2, 2 3 1 72 100 PZ

MSP430F6735IPZ 128 4 3 6 ext, 2 int 3, 2, 2, 2 3 1 72 100 PZ

MSP430F6734IPZ 96 4 3 6 ext, 2 int 3, 2, 2, 2 3 1 72 100 PZ

MSP430F6733IPZ 64 4 3 6 ext, 2 int 3, 2, 2, 2 3 1 72 100 PZ

MSP430F6731IPZ 32 2 3 6 ext, 2 int 3, 2, 2, 2 3 1 72 100 PZ

MSP430F6730IPZ 16 1 3 6 ext, 2 int 3, 2, 2, 2 3 1 72 100 PZ

MSP430F6726IPZ 128 8 2 6 ext, 2 int 3, 2, 2, 2 3 1 72 100 PZ

MSP430F6725IPZ 128 4 2 6 ext, 2 int 3, 2, 2, 2 3 1 72 100 PZ

MSP430F6724IPZ 96 4 2 6 ext, 2 int 3, 2, 2, 2 3 1 72 100 PZ

MSP430F6723IPZ 64 4 2 6 ext, 2 int 3, 2, 2, 2 3 1 72 100 PZ

MSP430F6721IPZ 32 2 2 6 ext, 2 int 3, 2, 2, 2 3 1 72 100 PZ

MSP430F6720IPZ 16 1 2 6 ext, 2 int 3, 2, 2, 2 3 1 72 100 PZ

MSP430F6736IPN 128 8 3 3 ext, 2 int 3, 2, 2, 2 3 1 52 80 PN

MSP430F6735IPN 128 4 3 3 ext, 2 int 3, 2, 2, 2 3 1 52 80 PN

MSP430F6734IPN 96 4 3 3 ext, 2 int 3, 2, 2, 2 3 1 52 80 PN

MSP430F6733IPN 64 4 3 3 ext, 2 int 3, 2, 2, 2 3 1 52 80 PN

MSP430F6731IPN 32 2 3 3 ext, 2 int 3, 2, 2, 2 3 1 52 80 PN

MSP430F6730IPN 16 1 3 3 ext, 2 int 3, 2, 2, 2 3 1 52 80 PN

MSP430F6726IPN 128 8 2 3 ext, 2 int 3, 2, 2, 2 3 1 52 80 PN

MSP430F6725IPN 128 4 2 3 ext, 2 int 3, 2, 2, 2 3 1 52 80 PN

MSP430F6724IPN 96 4 2 3 ext, 2 int 3, 2, 2, 2 3 1 52 80 PN

MSP430F6723IPN 64 4 2 3 ext, 2 int 3, 2, 2, 2 3 1 52 80 PN

MSP430F6721IPN 32 2 2 3 ext, 2 int 3, 2, 2, 2 3 1 52 80 PN

MSP430F6720IPN 16 1 2 3 ext, 2 int 3, 2, 2, 2 3 1 52 80 PN

(1) Each number in the sequence represents an instantiation of Timer_A with its associated number of capture compare registers and PWM

output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_A, the first

instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators, respectively.