Datasheet

P1.0/PM_TA0.0/VeREF-/A2
P1.1/PM_TA0.1/VeREF+/A1
P1SEL.x
1
0
P1DIR.x
P1IN.x
P1IRQ.x
EN
to Port Mapping
1
0
from Port Mapping
P1OUT.x
Interrupt
Edge
Select
Q
EN
Set
P1SEL.x
P1IES.x
P1IFG.x
P1IE.x
1
0
DVSS
DVCC
1
P1DS.x
0: Low drive
1: High drive
D
from Port Mapping
Pad Logic
To ADC10_A
INCHx = y
Bus
Keeper
to/from Reference
Direction
0: Input
1: Output
P1REN.x
P1MAP.x = PMAP_ANALOG
MSP430F673x
MSP430F672x
SLAS731C –DECEMBER 2011–REVISED FEBRUARY 2013 www.ti.com
INPUT/OUTPUT SCHEMATICS
Port P1, P1.0 and P1.1, Input/Output With Schmitt Trigger (MSP430F67xxIPZ and
MSP430F67xxIPN)
Table 63. Port P1 (P1.0 and P1.1) Pin Functions (MSP430F67xxIPZ and MSP430F67xxIPN)
CONTROL BITS/SIGNALS
(1)
PIN NAME (P1.x) x FUNCTION
P1DIR.x P1SEL.x P1MAPx
P1.0/PM_TA0.0/ 0 P1.0 (I/O) I: 0; O: 1 0 X
VeREF-/A2
TA0.CCI0A 0 1 default
TA0.TA0 1 1 default
VeREF-/A2
(2)
X 1 = 31
P1.1/PM_TA0.1/ 1 P1.1 (I/O) I: 0; O: 1 0 X
VeREF+/A1
TA0.CCI1A 0 1 default
TA0.TA1 1 1 default
VeREF+/A1
(2)
X 1 = 31
(1) X = Don't care
(2) Setting P1SEL.x bit together with P1MAPx = PM_ANALOG disables the output driver as well as the input Schmitt trigger.
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