Datasheet

MSP430F6638, MSP430F6637, MSP430F6636
MSP430F6635, MSP430F6634, MSP430F6633
MSP430F6632, MSP430F6631, MSP430F6630
SLAS566D –JUNE 2010–REVISED AUGUST 2013 www.ti.com
12-Bit ADC, Timing Parameters
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
For specified performance of ADC12 linearity
parameters using an external reference voltage or 0.45 4.8 5.0
AVCC as reference
(1)
f
ADC12CLK
ADC conversion clock For specified performance of ADC12 linearity 2.2 V, 3 V MHz
0.45 2.4 4.0
parameters using the internal reference
(2)
For specified performance of ADC12 linearity
0.45 2.4 2.7
parameters using the internal reference
(3)
Internal ADC12
f
ADC12OSC
ADC12DIV = 0, f
ADC12CLK
= f
ADC12OSC
2.2 V, 3 V 4.2 4.8 5.4 MHz
oscillator
(4)
REFON = 0, Internal oscillator,
2.2 V, 3 V 2.4 3.1
ADC12OSC used for ADC conversion clock
t
CONVERT
Conversion time µs
External f
ADC12CLK
from ACLK, MCLK or SMCLK,
(5)
ADC12SSEL ≠ 0
R
S
= 400 Ω, R
I
= 200 Ω, C
I
= 20 pF,
t
Sample
Sampling time 2.2 V, 3 V 1000 ns
τ = [R
S
+ R
I
] × C
I
(6)
(1) REFOUT = 0, external reference voltage: SREF2 = 0, SREF1 = 1, SREF0 = 0. AVCC as reference voltage: SREF2 = 0, SREF1 = 0,
SREF0 = 0. The specified performance of the ADC12 linearity is ensured when using the ADC12OSC. For other clock sources, the
specified performance of the ADC12 linearity is ensured with f
ADC12CLK
maximum of 5 MHz.
(2) SREF2 = 0, SREF1 = 1, SREF0 = 0, ADC12SR = 0, REFOUT = 1
(3) SREF2 = 0, SREF1 = 1, SREF0 = 0, ADC12SR = 0, REFOUT = 0. The specified performance of the ADC12 linearity is ensured when
using the ADC12OSC divided by 2.
(4) The ADC12OSC is sourced directly from MODOSC inside the UCS.
(5) 13 × ADC12DIV × 1/f
ADC12CLK
(6) Approximately ten Tau (τ) are needed to get an error of less than ±0.5 LSB:
t
Sample
= ln(2
n+1
) x (R
S
+ R
I
) × C
I
+ 800 ns, where n = ADC resolution = 12, R
S
= external source resistance
12-Bit ADC, Linearity Parameters Using an External Reference Voltage
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
1.4 V ≤ dVREF ≤ 1.6 V
(2)
±2
Integral
E
I
2.2 V, 3 V LSB
linearity error
(1)
1.6 V < dVREF
(2)
±1.7
Differential
E
D
(2)
2.2 V, 3 V ±1 LSB
linearity error
(1)
dVREF ≤ 2.2 V
(2)
2.2 V, 3 V ±3 ±5.6
E
O
Offset error
(3)
LSB
dVREF > 2.2 V
(2)
2.2 V, 3 V ±1.5 ±3.5
E
G
Gain error
(3) (2)
2.2 V, 3 V ±1 ±2.5 LSB
dVREF ≤ 2.2 V
(2)
2.2 V, 3 V ±3.5 ±7.1
Total unadjusted
E
T
LSB
error
dVREF > 2.2 V
(2)
2.2 V, 3 V ±2 ±5
(1) Parameters are derived using the histogram method.
(2) The external reference voltage is selected by: SREF2 = 0 or 1, SREF1 = 1, SREF0 = 0. dVREF = V
R+
- V
R-
. V
R+
< AVCC. V
R-
> AVSS.
Unless otherwise mentioned, dVREF > 1.5 V. Impedance of the external reference voltage R < 100 Ω, and two decoupling capacitors,
10 µF and 100 nF, should be connected to VREF+/VREF- to decouple the dynamic current. See also the MSP430F5xx and
MSP430F6xx Family User's Guide (SLAU208).
(3) Parameters are derived using a best fit curve.
12-Bit ADC, Linearity Parameters Using AVCC as Reference Voltage
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
E
I
Integral linearity error
(1)
See
(2)
2.2 V, 3 V ±1.7 LSB
E
D
Differential linearity error
(1)
See
(2)
2.2 V, 3 V ±1 LSB
(1) Parameters are derived using the histogram method.
(2) AVCC as reference voltage is selected by: SREF2 = 0, SREF1 = 0, SREF0 = 0.
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