Datasheet

MSP430F6638, MSP430F6637, MSP430F6636
MSP430F6635, MSP430F6634, MSP430F6633
MSP430F6632, MSP430F6631, MSP430F6630
www.ti.com SLAS566D –JUNE 2010–REVISED AUGUST 2013
Table 40. Battery Backup Registers (Base Address: 0480h)
REGISTER DESCRIPTION REGISTER OFFSET
Battery Backup Memory 0 BAKMEM0 00h
Battery Backup Memory 1 BAKMEM1 02h
Battery Backup Memory 2 BAKMEM2 04h
Battery Backup Memory 3 BAKMEM3 06h
Battery Backup Control BAKCTL 1Ch
Battery Charger Control BAKCHCTL 1Eh
Table 41. Real-Time Clock Registers (Base Address: 04A0h)
REGISTER DESCRIPTION REGISTER OFFSET
RTC control register 0 RTCCTL0 00h
RTC control register 1 RTCCTL1 01h
RTC control register 2 RTCCTL2 02h
RTC control register 3 RTCCTL3 03h
RTC prescaler 0 control register RTCPS0CTL 08h
RTC prescaler 1 control register RTCPS1CTL 0Ah
RTC prescaler 0 RTCPS0 0Ch
RTC prescaler 1 RTCPS1 0Dh
RTC interrupt vector word RTCIV 0Eh
RTC seconds RTCSEC 10h
RTC minutes RTCMIN 11h
RTC hours RTCHOUR 12h
RTC day of week RTCDOW 13h
RTC days RTCDAY 14h
RTC month RTCMON 15h
RTC year low RTCYEARL 16h
RTC year high RTCYEARH 17h
RTC alarm minutes RTCAMIN 18h
RTC alarm hours RTCAHOUR 19h
RTC alarm day of week RTCADOW 1Ah
RTC alarm days RTCADAY 1Bh
Binary-to-BCD conversion register BIN2BCD 1Ch
BCD-to-binary conversion register BCD2BIN 1Eh
Table 42. 32-bit Hardware Multiplier Registers (Base Address: 04C0h)
REGISTER DESCRIPTION REGISTER OFFSET
16-bit operand 1 – multiply MPY 00h
16-bit operand 1 – signed multiply MPYS 02h
16-bit operand 1 – multiply accumulate MAC 04h
16-bit operand 1 – signed multiply accumulate MACS 06h
16-bit operand 2 OP2 08h
16 × 16 result low word RESLO 0Ah
16 × 16 result high word RESHI 0Ch
16 × 16 sum extension register SUMEXT 0Eh
32-bit operand 1 – multiply low word MPY32L 10h
32-bit operand 1 – multiply high word MPY32H 12h
32-bit operand 1 – signed multiply low word MPYS32L 14h
32-bit operand 1 – signed multiply high word MPYS32H 16h
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MSP430F6632 MSP430F6631 MSP430F6630