Datasheet

Unified
Clock
System
256KB
192KB
128KB
Flash
MCLK
ACLK
SMCLK
I/O Ports
P1/P2
2×8 I/Os
Interrupt
Capability
PA
1×16 I/Os
CPUXV2
and
Working
Registers
EEM
(L: 8+2)
XIN
XOUT
JTAG/
SBW
Interface/
Port PJ
PA PB PC PD
DMA
6 Channel
XT2IN
XT2OUT
Power
Management
LDO
SVM/SVS
Brownout
SYS
Watchdog
P2 Port
Mapping
Controller
I/O Ports
P3/P4
2×8 I/Os
Interrupt
Capability
PB
1×16 I/Os
I/O Ports
P5/P6
2×8 I/Os
PC
1×16 I/Os
I/O Ports
P7/P8
1×6 I/Os
PD
1×14 I/Os
1×8 I/Os
I/O Ports
P9
1×8 I/Os
PE
1×8 I/Os
MPY32
TA0
Timer_A
5 CC
Registers
TA1 and
TA2
2 Timer_A
each with
3 CC
Registers
TB0
Timer_B
7 CC
Registers
CRC16
USCI0,1
Ax: UART,
IrDA, SPI
Bx: SPI, I2C
DV
CC
DV
SS
AV
CC
AV
SS
P1.x P2.x
P3.x
P4.x
P5.x P6.x
P7.x
P8.x P9.x
RST/NMI
REF
Reference
1.5V, 2.0V,
2.5V
LCD_B
160
Segments
USB
Full-speed
Comp_B
PJ.x
RTC_B
Battery
Backup
System
16KB
RAM
+2KB RAM
USB Buffer
+8B Backup
RAM
MSP430F6638, MSP430F6637, MSP430F6636
MSP430F6635, MSP430F6634, MSP430F6633
MSP430F6632, MSP430F6631, MSP430F6630
SLAS566D –JUNE 2010–REVISED AUGUST 2013 www.ti.com
Functional Block Diagram, MSP430F6632, MSP430F6631, MSP430F6630
4 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated
Product Folder Links: MSP430F6638 MSP430F6637 MSP430F6636 MSP430F6635 MSP430F6634 MSP430F6633
MSP430F6632 MSP430F6631 MSP430F6630