Datasheet

MSP430F6638, MSP430F6637, MSP430F6636
MSP430F6635, MSP430F6634, MSP430F6633
MSP430F6632, MSP430F6631, MSP430F6630
www.ti.com SLAS566D –JUNE 2010–REVISED AUGUST 2013
Bootstrap Loader (BSL)
The BSL enables users to program the flash memory or RAM using various serial interfaces. Access to the
device memory via the BSL is protected by an user-defined password. For complete description of the features of
the BSL and its implementation, see MSP430 Programming Via the Bootstrap Loader (BSL) (SLAU319).
USB BSL
All devices come pre-programmed with the USB BSL. Use of the USB BSL requires external access to the six
pins shown in Table 7. In addition to these pins, the application must support external components necessary for
normal USB operation; for example, the proper crystal on XT2IN and XT2OUT or proper decoupling.
Table 7. USB BSL Pin Requirements and Functions
DEVICE SIGNAL BSL FUNCTION
RST/NMI/SBWTDIO Entry sequence signal
PU.0/DP USB data terminal DP
PU.1/DM USB data terminal DM
PUR USB pullup resistor terminal
VBUS USB bus power supply
VSSU USB ground supply
NOTE
The default USB BSL evaluates the logic level of the PUR pin after a BOR reset. If it is
pulled high externally, then the BSL is invoked. Therefore, unless the application is
invoking the BSL, it is important to keep PUR pulled low after a BOR reset, even if BSL or
USB is never used. Applying a 1-MΩ resistor to ground is recommended.
UART BSL
A UART BSL is also available that can be programmed by the user into the BSL memory by replacing the pre-
programmed, factory supplied, USB BSL. Use of the UART BSL requires external access to the six pins shown
in Table 8.
Table 8. UART BSL Pin Requirements and Functions
DEVICE SIGNAL BSL FUNCTION
RST/NMI/SBWTDIO Entry sequence signal
TEST/SBWTCK Entry sequence signal
P1.1 Data transmit
P1.2 Data receive
VCC Power supply
VSS Ground supply
JTAG Operation
JTAG Standard Interface
The MSP430 family supports the standard JTAG interface which requires four signals for sending and receiving
data. The JTAG signals are shared with general-purpose I/O. The TEST/SBWTCK pin is used to enable the
JTAG signals. In addition to these signals, the RST/NMI/SBWTDIO is required to interface with MSP430
development tools and device programmers. The JTAG pin requirements are shown in Table 9. For further
details on interfacing to development tools and device programmers, see the MSP430(tm) Hardware Tools
User's Guide (SLAU278). For a complete description of the features of the JTAG interface and its
implementation, see MSP430 Programming Via the JTAG Interface (SLAU320).
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Product Folder Links: MSP430F6638 MSP430F6637 MSP430F6636 MSP430F6635 MSP430F6634 MSP430F6633
MSP430F6632 MSP430F6631 MSP430F6630