Datasheet

PJ.1/TDI/TCLK
PJ.2/TMS
PJ.3/TCK
From JTAG
1
0
PJDIR.x
PJIN.x
EN
1
0
From JTAG
PJOUT.x
1
0
DV
SS
DV
CC
PJREN.x
Pad Logic
1
PJDS.x
0: Low drive
1: High drive
D
DVSS
To JTAG
PJ.0/TDO
From JTAG
1
0
PJDIR.0
PJIN.0
EN
1
0
From JTAG
PJOUT.0
1
0
DV
SS
DV
CC
PJREN.0
Pad Logic
1
PJDS.0
0: Low drive
1: High drive
D
DVCC
MSP430F6638, MSP430F6637, MSP430F6636
MSP430F6635, MSP430F6634, MSP430F6633
MSP430F6632, MSP430F6631, MSP430F6630
www.ti.com SLAS566D –JUNE 2010–REVISED AUGUST 2013
Port J, J.0 JTAG pin TDO, Input/Output With Schmitt Trigger or Output
Port J, J.1 to J.3 JTAG pins TMS, TCK, TDI/TCLK, Input/Output With Schmitt Trigger or Output
Copyright © 2010–2013, Texas Instruments Incorporated Submit Documentation Feedback 105
Product Folder Links: MSP430F6638 MSP430F6637 MSP430F6636 MSP430F6635 MSP430F6634 MSP430F6633
MSP430F6632 MSP430F6631 MSP430F6630