Datasheet

P5.0/VREF+/VeREF+
P5.1/VREF–/VeREF–
P5SEL.x
1
0
P5DIR.x
P5IN.x
EN
ModuleXIN
1
0
ModuleXOUT
P5OUT.x
1
0
DV
SS
DV
CC
P5REN.x
PadLogic
1
P5DS.x
0:Lowdrive
1:Highdrive
D
Bus
Keeper
To/From
Reference
MSP430F6438, MSP430F6436
MSP430F6435, MSP430F6433
www.ti.com SLAS720C –AUGUST 2010–REVISED AUGUST 2013
Port P5, P5.0 and P5.1, Input/Output With Schmitt Trigger
Table 56. Port P5 (P5.0 and P5.1) Pin Functions
CONTROL BITS/SIGNALS
(1)
PIN NAME (P5.x) x FUNCTION
P5DIR.x P5SEL.x REFOUT
P5.0/VREF+/VeREF+ 0 P5.0 (I/O)
(2)
I: 0; O: 1 0 X
VeREF+
(3)
X 1 0
VREF+
(4)
X 1 1
P5.1/VREF–/VeREF– 1 P5.1 (I/O)
(2)
I: 0; O: 1 0 X
VeREF–
(5)
X 1 0
VREF–
(6)
X 1 1
(1) X = Don't care
(2) Default condition
(3) Setting the P5SEL.0 bit disables the output driver as well as the input Schmitt trigger to prevent parasitic cross currents when applying
analog signals. An external voltage can be applied to VeREF+ and used as the reference for the ADC12_A, Comparator_B, or
DAC12_A.
(4) Setting the P5SEL.0 bit disables the output driver as well as the input Schmitt trigger to prevent parasitic cross currents when applying
analog signals. The ADC12_A, VREF+ reference is available at the pin.
(5) Setting the P5SEL.1 bit disables the output driver as well as the input Schmitt trigger to prevent parasitic cross currents when applying
analog signals. An external voltage can be applied to VeREF- and used as the reference for the ADC12_A, Comparator_B, or
DAC12_A.
(6) Setting the P5SEL.1 bit disables the output driver as well as the input Schmitt trigger to prevent parasitic cross currents when applying
analog signals. The ADC12_A, VREF– reference is available at the pin.
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