Datasheet

MSP430F6438, MSP430F6436
MSP430F6435, MSP430F6433
www.ti.com SLAS720C –AUGUST 2010–REVISED AUGUST 2013
Battery Backup
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
T
A
= -40°C 0.43
VBAT = 1.7 V,
T
A
= 25°C 0.52
DVCC not connected, µA
T
A
= 60°C 0.58
RTC running
T
A
= 85°C 0.64
T
A
= -40°C 0.50
Current into VBAT terminal in VBAT = 2.2 V,
T
A
= 25°C 0.59
I
VBAT
case no primary battery is DVCC not connected, µA
T
A
= 60°C 0.64
connected. RTC running
T
A
= 85°C 0.71
T
A
= -40°C 0.68
VBAT = 3 V,
T
A
= 25°C 0.75
DVCC not connected, µA
T
A
= 60°C 0.79
RTC running
T
A
= 85°C 0.86
General V
SVSH_IT-
SVSHRL = 0 1.59 1.69
Switch-over level (V
CC
to
V
SWITCH
C
VCC
= 4.7 µF SVSHRL = 1 1.79 1.91 V
VBAT)
SVSHRL = 2 1.98 2.11
SVSHRL = 3 2.10 2.23
On-resistance of switch 0.35 1
R
ON_VBAT
V
BAT
= 1.8 V 0 V kΩ
between VBAT and VBAK
VBAT to ADC input channel 1.8 V 0.6 ±5%
12:
3 V 1.0 ±5%
V
BAT3
V
V
BAT
divide,
1.2 ±5%
3.6 V
V
BAT3
≠ V
BAT
/3
t
Sample,VBA
VBAT to ADC: Sampling time ADC12ON = 1, 1000
ns
T3
required if VBAT3 selected Error of conversion result ≤ 1 LSB
V
CHVx
Charger end voltage CHVx = 2 2.65 2.7 2.9 V
CHCx = 1 5
R
CHARGE
Charge limiting resistor CHCx = 2 10 kΩ
CHCx = 3 20
USCI (UART Mode)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
Internal: SMCLK, ACLK
f
USCI
USCI input clock frequency External: UCLK f
SYSTEM
MHz
Duty cycle = 50% ± 10%
BITCLK clock frequency
f
BITCLK
1 MHz
(equals baud rate in MBaud)
2.2 V 50 600
t
τ
UART receive deglitch time
(1)
ns
3 V 50 600
(1) Pulses on the UART receive input (UCxRX) shorter than the UART receive deglitch time are suppressed. To ensure that pulses are
correctly recognized their width should exceed the maximum specification of the deglitch time.
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