Datasheet

P8.0/TB0CLK
P8.1/UCB1STE/UCA1CLK
P8.2/UCA1TXD/UCA1SIMO
P8.3/UCA1RXD/UCA1SOMI
P8.4/UCB1CLK/UCA1STE
P8.5/UCB1SIMO//UCB1SDA
P8.6/UCB1SOMI/UCB1SCL
P8.7
Direction
0:Input
1:Output
P8SEL.x
1
0
P8DIR.x
P8IN.x
EN
ModuleXIN
1
0
ModuleXOUT
P8OUT.x
1
0
DV
SS
DV
CC
P8REN.x
PadLogic
1
P8DS.x
0:Lowdrive
1:Highdrive
D
Frommodule
MSP430F5638, MSP430F5637, MSP430F5636
MSP430F5635, MSP430F5634, MSP430F5633
MSP430F5632, MSP430F5631, MSP430F5630
SLAS650D JUNE 2010REVISED AUGUST 2013
www.ti.com
Port P8, P8.0 to P8.7, Input/Output With Schmitt Trigger
Table 62. Port P8 (P8.0 to P8.7) Pin Functions
CONTROL BITS/SIGNALS
(1)
PIN NAME (P9.x) x FUNCTION
P8DIR.x P8SEL.x
P8.0/TB0CLK 0 P8.0 (I/O) I: 0; O: 1 0
Timer TB0.TB0CLK clock input 0 1
P8.1/UCB1STE/UCA1CLK 1 P8.1 (I/O) I: 0; O: 1 0
UCB1STE/UCA1CLK X 1
P8.2/UCA1TXD/UCA1SIMO 2 P8.2 (I/O) I: 0; O: 1 0
UCA1TXD/UCA1SIMO X 1
P8.3/UCA1RXD/UCA1SOMI 3 P8.3 (I/O) I: 0; O: 1 0
UCA1RXD/UCA1SOMI X 1
P8.4/UCB1CLK/UCA1STE 4 P8.4 (I/O) I: 0; O: 1 0
UCB1CLK/UCA1STE X 1
P8.5/UCB1SIMO/UCB1SDA 5 P8.5 (I/O) I: 0; O: 1 0
UCB1SIMO/UCB1SDA X 1
P8.6/UCB1SOMI/UCB1SCL 6 P8.6 (I/O) I: 0; O: 1 0
UCB1SOMI/UCB1SCL X 1
P8.7 7 P8.7 (I/O) I: 0; O: 1 0
(1) X = Don't care
94 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated
Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633
MSP430F5632 MSP430F5631 MSP430F5630