Datasheet
Table Of Contents
- Features
- Applications
- Description
- Development Tools Support
- Device and Development Tool Nomenclature
- Short-Form Description
- CPU
- Operating Modes
- Interrupt Vector Addresses
- Memory Organization
- Bootstrap Loader (BSL)
- JTAG Operation
- Flash Memory
- RAM Memory
- Peripherals
- Digital I/O
- Port Mapping Controller
- Oscillator and System Clock
- Power Management Module (PMM)
- Hardware Multiplier
- Real-Time Clock (RTC_A)
- Watchdog Timer (WDT_A)
- System Module (SYS)
- DMA Controller
- Universal Serial Communication Interface (USCI)
- TA0
- TA1
- TA2
- TB0
- Comparator_B
- ADC12_A
- CRC16
- REF Voltage Reference
- Embedded Emulation Module (EEM)
- Peripheral File Map
- Absolute Maximum Ratings
- Thermal Packaging Characteristics
- Recommended Operating Conditions
- Electrical Characteristics
- Active Mode Supply Current Into VCC Excluding External Current
- Low-Power Mode Supply Currents (Into VCC) Excluding External Current
- Schmitt-Trigger Inputs – General Purpose I/O (P1.0 to P1.7, P2.7, P3.0 to P3.4, P4.0 to P4.7) (P5.0 to P5.5, P5.7, P6.1 to P6.5, PJ.0 to PJ.3, RST/NMI)
- Inputs – Ports P1 and P2 (P1.0 to P1.7, P2.0 to P2.7)
- Leakage Current – General Purpose I/O (P1.0 to P1.7, P2.7, P3.0 to P3.4, P4.0 to P4.7) (P5.0 to P5.5, P5.7, P6.1 to P6.5, PJ.0 to PJ.3, RST/NMI)
- Outputs – General Purpose I/O (Full Drive Strength) (P1.0 to P1.7, P2.7, P3.0 to P3.4, P4.0 to P4.7) (P5.0 to P5.5, P5.7, P6.1 to P6.5, PJ.0 to PJ.3)
- Outputs – General Purpose I/O (Reduced Drive Strength) (P1.0 to P1.7, P2.7, P3.0 to P3.4, P4.0 to P4.7) (P5.0 to P5.5, P5.7, P6.1 to P6.5, PJ.0 to PJ.3)
- Output Frequency – General Purpose I/O (P1.0 to P1.7, P2.7, P3.0 to P3.4, P4.0 to P4.7) (P5.0 to P5.5, P5.7, P6.1 to P6.5, PJ.0 to PJ.3)
- Typical Characteristics – Outputs, Reduced Drive Strength (PxDS.y = 0)
- Typical Characteristics – Outputs, Full Drive Strength (PxDS.y = 1)
- Crystal Oscillator, XT1, Low-Frequency Mode
- Crystal Oscillator, XT2
- Internal Very-Low-Power Low-Frequency Oscillator (VLO)
- Internal Reference, Low-Frequency Oscillator (REFO)
- DCO Frequency
- PMM, Brown-Out Reset (BOR)
- PMM, Core Voltage
- PMM, SVS High Side
- PMM, SVM High Side
- PMM, SVS Low Side
- PMM, SVM Low Side
- Wake Up From Low Power Modes and Reset
- Timer_A
- Timer_B
- USCI (UART Mode) Recommended Operating Conditions
- USCI (UART Mode)
- USCI (SPI Master Mode) Recommended Operating Conditions
- USCI (SPI Master Mode)
- USCI (SPI Slave Mode)
- USCI (I2C Mode)
- 12-Bit ADC, Power Supply and Input Range Conditions
- 12-Bit ADC, Timing Parameters
- 12-Bit ADC, Linearity Parameters Using an External Reference Voltage or AVCC as Reference Voltage
- 12-Bit ADC, Linearity Parameters Using the Internal Reference Voltage
- 12-Bit ADC, Temperature Sensor and Built-In VMID
- REF, External Reference
- REF, Built-In Reference
- Comparator B
- Flash Memory
- JTAG and Spy-Bi-Wire Interface
- Input/Output Schematics
- Port P1, P1.0 to P1.7, Input/Output With Schmitt Trigger
- Port P2, P2.7, Input/Output With Schmitt Trigger
- Port P3, P3.0 to P3.4, Input/Output With Schmitt Trigger
- Port P4, P4.0 to P4.7, Input/Output With Schmitt Trigger
- Port P5, P5.0 and P5.1, Input/Output With Schmitt Trigger
- Port P5, P5.2, Input/Output With Schmitt Trigger
- Port P5, P5.3, Input/Output With Schmitt Trigger
- Port P5, P5.4 and P5.5 Input/Output With Schmitt Trigger
- Port P5, P5.7, Input/Output With Schmitt Trigger
- Port P6, P6.1 to P6.5, Input/Output With Schmitt Trigger
- Port J, J.0 JTAG pin TDO, Input/Output With Schmitt Trigger or Output
- Port J, J.1 to J.3 JTAG pins TMS, TCK, TDI/TCLK, Input/Output With Schmitt Trigger or Output
- Device Descriptors
- Revision History

MSP430F5342, MSP430F5341, MSP430F5340
www.ti.com
SLAS706E –JULY 2011–REVISED AUGUST 2013
REF, Built-In Reference
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
(1)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
REFVSEL = {2} for 2.5 V,
3 V 2.4625 2.50 2.5375
REFON = REFOUT = 1, I
VREF+
= 0 A
Positive built-in reference REFVSEL = {1} for 2.0 V,
V
REF+
3 V 1.9503 1.98 2.0097 V
voltage output REFON = REFOUT = 1, I
VREF+
= 0 A
REFVSEL = {0} for 1.5 V,
2.2 V/ 3 V 1.4677 1.49 1.5124
REFON = REFOUT = 1, I
VREF+
= 0 A
REFVSEL = {0} for 1.5 V 2.2
AV
CC
minimum voltage,
AV
CC(min)
Positive built-in reference REFVSEL = {1} for 2.0 V 2.3 V
active
REFVSEL = {2} for 2.5 V 2.8
ADC12SR = 1
(4)
, REFON = 1, REFOUT = 0,
3 V 70 100 µA
REFBURST = 0
ADC12SR = 1
(4)
, REFON = 1, REFOUT = 1,
3 V 0.45 0.75 mA
REFBURST = 0
Operating supply current into
I
REF+
AVCC terminal
(2) (3)
ADC12SR = 0
(4)
, REFON = 1, REFOUT = 0,
3 V 210 310 µA
REFBURST = 0
ADC12SR = 0
(4)
, REFON = 1, REFOUT = 1,
3 V 0.95 1.7 mA
REFBURST = 0
REFVSEL = (0, 1, 2),
Load-current regulation, I
VREF+
= +10 µA/-1000 µA,
I
L(VREF+)
2500 µV/mA
VREF+ terminal
(5)
AV
CC
= AV
CC (min)
for each reference level,
REFVSEL = (0, 1, 2}, REFON = REFOUT = 1
Capacitance at VREF+
C
VREF+
REFON = REFOUT = 1 20 100 pF
terminals
I
VREF+
= 0 A,
Temperature coefficient of ppm/
TC
REF+
REFVSEL = (0, 1, 2}, REFON = 1, 30 50
built-in reference
(6)
°C
REFOUT = 0 or 1
AV
CC
= AV
CC (min)
- AV
CC(max)
,
Power supply rejection ratio
PSRR_DC T
A
= 25°C, REFVSEL = (0, 1, 2}, REFON = 1, 120 300 µV/V
(DC)
REFOUT = 0 or 1
AV
CC
= AV
CC (min)
- AV
CC(max)
,
Power supply rejection ratio T
A
= 25°C, f = 1 kHz, ΔVpp = 100 mV,
PSRR_AC 6.4 mV/V
(AC) REFVSEL = (0, 1, 2}, REFON = 1,
REFOUT = 0 or 1
AV
CC
= AV
CC (min)
- AV
CC(max)
,
REFVSEL = (0, 1, 2}, REFOUT = 0, 75
REFON = 0 → 1
Settling time of reference
t
SETTLE
µs
AV
CC
= AV
CC (min)
- AV
CC(max)
,
voltage
(7)
C
VREF
= C
VREF
(max),
75
REFVSEL = (0, 1, 2}, REFOUT = 1,
REFON = 0 → 1
(1) The reference is supplied to the ADC by the REF module and is buffered locally inside the ADC. The ADC uses two internal buffers, one
smaller and one larger, for driving the VREF+ terminal. When REFOUT = 1, the reference is available at the VREF+ terminal and is
used as the reference for the conversion and utilizes the larger buffer. When REFOUT = 0, the reference is only used as the reference
for the conversion and utilizes the smaller buffer.
(2) The internal reference current is supplied via terminal AVCC. Consumption is independent of the ADC12ON control bit, unless a
conversion is active. REFOUT = 0 represents the current contribution of the smaller buffer. REFOUT = 1 represents the current
contribution of the larger buffer without external load.
(3) The temperature sensor is provided by the REF module. Its current is supplied via terminal AVCC and is equivalent to I
REF+
with
REFON =1 and REFOUT = 0.
(4) For devices without the ADC12, the parametric with ADC12SR = 0 are applicable.
(5) Contribution only due to the reference and buffer including package. This does not include resistance due to PCB trace, etc.
(6) Calculated using the box method: (MAX(-40 to 85°C) – MIN(-40 to 85°C)) / MIN(-40 to 85°C)/(85°C – (-40°C)).
(7) The condition is that the error in a conversion started after t
REFON
is less than ± 0.5 LSB. The settling time depends on the external
capacitive load when REFOUT = 1.
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