Datasheet

MSP430F5342, MSP430F5341, MSP430F5340
www.ti.com SLAS706E –JULY 2011–REVISED AUGUST 2013
Table 2. Terminal Functions (continued)
TERMINAL
I/O
(1)
DESCRIPTION
NAME NO.
General-purpose digital I/O with reconfigurable port mapping secondary function
P4.7/PM_NONE 36 I/O
Default mapping: no secondary function.
General-purpose digital I/O
P5.7/TB0.1 37 I/O
TB0 CCR1 capture: CCI1A input, compare: Out1 output
DVSS3 38 Digital ground supply
General-purpose digital I/O
P5.2/XT2IN 39 I/O
Input terminal for crystal oscillator XT2
General-purpose digital I/O
P5.3/XT2OUT 40 I/O
Output terminal of crystal oscillator XT2
Test mode pin – Selects four wire JTAG operation.
TEST/SBWTCK
(3)
41 I
Spy-Bi-Wire input clock when Spy-Bi-Wire operation activated
General-purpose digital I/O
PJ.0/TDO
(4)
42 I/O
JTAG test data output port
General-purpose digital I/O
PJ.1/TDI/TCLK
(5)
43 I/O
JTAG test data input or test clock input
General-purpose digital I/O
PJ.2/TMS
(5)
44 I/O
JTAG test mode select
General-purpose digital I/O
PJ.3/TCK
(5)
45 I/O
JTAG test clock
Reset input active low
(7)
RST/NMI/SBWTDIO
(6)
46 I/O
Non-maskable interrupt input
Spy-Bi-Wire data input/output when Spy-Bi-Wire operation activated.
General-purpose digital I/O
P6.1/CB1/A1 47 I/O
Comparator_B input CB1
Analog input A1 – ADC
General-purpose digital I/O
P6.2/CB2/A2 48 I/O
Comparator_B input CB2
Analog input A2 – ADC
Thermal Pad QFN package pad. Connection to V
SS
is recommended.
(3) See Bootstrap Loader (BSL) and JTAG Operation for use with BSL and JTAG functions
(4) See JTAG Operation for use with JTAG function.
(5) See JTAG Operation for use with JTAG function.
(6) See Bootstrap Loader (BSL) and JTAG Operation for use with BSL and JTAG functions
(7) When this pin is configured as reset, the internal pullup resistor is enabled by default.
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