Datasheet

MSP430F5342, MSP430F5341, MSP430F5340
SLAS706E –JULY 2011–REVISED AUGUST 2013 www.ti.com
Table 24. SYS Registers (Base Address: 0180h)
REGISTER DESCRIPTION REGISTER OFFSET
System control SYSCTL 00h
Bootstrap loader configuration area SYSBSLC 02h
JTAG mailbox control SYSJMBC 06h
JTAG mailbox input 0 SYSJMBI0 08h
JTAG mailbox input 1 SYSJMBI1 0Ah
JTAG mailbox output 0 SYSJMBO0 0Ch
JTAG mailbox output 1 SYSJMBO1 0Eh
Bus Error vector generator SYSBERRIV 18h
User NMI vector generator SYSUNIV 1Ah
System NMI vector generator SYSSNIV 1Ch
Reset vector generator SYSRSTIV 1Eh
Table 25. Shared Reference Registers (Base Address: 01B0h)
REGISTER DESCRIPTION REGISTER OFFSET
Shared reference control REFCTL 00h
Table 26. Port Mapping Registers
(Base Address of Port Mapping Control: 01C0h, Port P4: 01E0h)
REGISTER DESCRIPTION REGISTER OFFSET
Port mapping key/ID register PMAPKEYID 00h
Port mapping control register PMAPCTL 02h
Port P4.0 mapping register P4MAP0 00h
Port P4.1 mapping register P4MAP1 01h
Port P4.2 mapping register P4MAP2 02h
Port P4.3 mapping register P4MAP3 03h
Port P4.4 mapping register P4MAP4 04h
Port P4.5 mapping register P4MAP5 05h
Port P4.6 mapping register P4MAP6 06h
Port P4.7 mapping register P4MAP7 07h
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