Datasheet

P7.4/TB0.2
P7.5/TB0.3
P7.6/TB0.4
P7.7/TB0CLK/MCLK
Direction
0:Input
1:Output
P7SEL.x
1
0
P7DIR.x
P7IN.x
EN
Tomodule
1
0
Frommodule
P7OUT.x
1
0
DV
SS
DV
CC
P7REN.x
PadLogic
1
P7DS.x
0:Lowdrive
1:Highdrive
D
MSP430F532x
SLAS678D AUGUST 2010REVISED FEBRUARY 2013
www.ti.com
Port P7, P7.4 to P7.7, Input/Output With Schmitt Trigger
Table 57. Port P7 (P7.4 to P7.7) Pin Functions
CONTROL BITS/SIGNALS
PIN NAME (P7.x) x FUNCTION
P7DIR.x P7SEL.x
P7.4/TB0.2
(1)
4 P7.4 (I/O) I: 0; O: 1 0
TB0.CCI2A 0 1
TB0.2 1 1
P7.5/TB0.3
(1)
5 P7.5 (I/O) I: 0; O: 1 0
TB0.CCI3A 0 1
TB0.3 1 1
P7.6/TB0.4
(1)
6 P7.6 (I/O) I: 0; O: 1 0
TB0.CCI4A 0 1
TB0.4 1 1
P7.7/TB0CLK/MCLK
(1)
7 P7.7 (I/O) I: 0; O: 1 0
TB0CLK 0 1
MCLK 1 1
(1) F5329, F5327, F5325 devices only.
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