Datasheet

MSP430F532x
SLAS678D –AUGUST 2010–REVISED FEBRUARY 2013 www.ti.com
LDO-PWR (LDO Power System)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
LAUNCH
LDO input detection threshold 3.75 V
V
LDOI
LDO input voltage 3.76 5.5 V
V
LDO
LDO output voltage 3.3 ±9% V
V
LDO_EXT
LDOO terminal input voltage with LDO disabled LDO disabled 1.8 3.6 V
I
LDOO
Maximum external current from LDOO terminal LDO is on 20 mA
I
DET
LDO current overload detection
(1)
60 100 mA
C
LDOI
LDOI terminal recommended capacitance 4.7 µF
C
LDOO
LDOO terminal recommended capacitance 220 nF
Within 2%, recommended
t
ENABLE
Settling time V
LDO
2 ms
capacitances
(1) A current overload is detected when the total current supplied from the LDO exceeds this value.
Flash Memory
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST
PARAMETER MIN TYP MAX UNIT
CONDITIONS
DV
CC(PGM/ERASE)
Program or erase supply voltage 1.8 3.6 V
I
PGM
Average supply current from DVCC during program 3 5 mA
I
ERASE
Average supply current from DVCC during erase 6 11 mA
Average supply current from DVCC during mass erase or bank
I
MERASE
, I
BANK
6 11 mA
erase
t
CPT
Cumulative program time See
(1)
16 ms
Program and erase endurance 10
4
10
5
cycles
t
Retention
Data retention duration T
J
= 25°C 100 years
t
Word
Word or byte program time See
(2)
64 85 µs
t
Block, 0
Block program time for first byte or word See
(2)
49 65 µs
Block program time for each additional byte or word, except for last
t
Block, 1–(N–1)
See
(2)
37 49 µs
byte or word
t
Block, N
Block program time for last byte or word See
(2)
55 73 µs
Erase time for segment, mass erase, and bank erase (when
t
Erase
See
(2)
23 32 ms
available)
MCLK frequency in marginal read mode
f
MCLK,MGR
0 1 MHz
(FCTL4.MGR0 = 1 or FCTL4. MGR1 = 1)
(1) The cumulative program time must not be exceeded when writing to a 128-byte flash block. This parameter applies to all programming
methods: individual word/byte write and block write modes.
(2) These values are hardwired into the flash controller's state machine.
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