Datasheet

PUOPE
PUOUT0
Pad Logic
PU.0
LDOO VSSU
PU.1
PUOUT1
PUIN1
PUIN0
PUIPE
MSP430F5310, MSP430F5309
MSP430F5308, MSP430F5304
www.ti.com SLAS677E –SEPTEMBER 2010–REVISED NOVEMBER 2013
Port PU.0, PU.1 Ports
Table 53. Port PU.0, PU.1 Output Functions
(1)
CONTROL BITS PIN NAME
PUOPE PUOUT1 PUOUT0 PU.1/DM PU.0/DP
0 X X Output disabled Output disabled
1 0 0 Output low Output low
1 0 1 Output low Output high
1 1 0 Output high Output low
1 1 1 Output high Output high
(1) PU.1 and PU.0 inputs and outputs are supplied from LDOO. LDOO can be generated by the device
using the integrated 3.3-V LDO when enabled. LDOO can also be supplied externally when the 3.3-V
LDO is not being used and is disabled.
Table 54. Port PU.0, PU.1 Input Functions
(1)
CONTROL BITS PIN NAME
PUIPE PU.1/DM PU.0/DP
0 Input disabled Input disabled
1 Input enabled Input enabled
(1) PU.1 and PU.0 inputs and outputs are supplied from LDOO. LDOO
can be generated by the device using the integrated 3.3-V LDO
when enabled. LDOO can also be supplied externally when the 3.3-
V LDO is not being used and is disabled.
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