Datasheet

MSP430F5310, MSP430F5309
MSP430F5308, MSP430F5304
SLAS677E –SEPTEMBER 2010–REVISED NOVEMBER 2013 www.ti.com
Table 46. Port P2 (P2.0 to P2.7) Pin Functions
CONTROL BITS AND
SIGNALS
(1)
PIN NAME (P2.x) x FUNCTION
P2DIR.x P2SEL.x
P2.0/TA1.1 0 P2.0 (I/O) I: 0; O: 1 0
TA1.CCI1A 0 1
TA1.1 1 1
P2.1/TA1.2 1 P2.1 (I/O) I: 0; O: 1 0
TA1.CCI2A 0 1
TA1.2 1 1
P2.2/TA2CLK/SMCLK 2 P2.2 (I/O) I: 0; O: 1 0
TA2CLK 0 1
SMCLK 1 1
P2.3/TA2.0 3 P2.3 (I/O) I: 0; O: 1 0
TA2.CCI0A 0 1
TA2.0 1 1
P2.4/TA2.1 4 P2.4 (I/O) I: 0; O: 1 0
TA2.CCI1A 0 1
TA2.1 1 1
P2.5/TA2.2 5 P2.5 (I/O) I: 0; O: 1 0
TA2.CCI2A 0 1
TA2.2 1 1
P2.6/RTCCLK/DMAE0 6 P2.6 (I/O) I: 0; O: 1 0
DMAE0 0 1
RTCCLK 1 1
P2.7/UCB0STE/UCA0CLK 7 P2.7 (I/O) I: 0; O: 1 0
UCB0STE/UCA0CLK
(2) (3)
X 1
(1) X = Don't care
(2) The pin direction is controlled by the USCI module.
(3) UCA0CLK function takes precedence over UCB0STE function. If the pin is required as UCA0CLK input or output, USCI B0 is forced to
3-wire SPI mode if 4-wire SPI mode is selected.
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