Datasheet

MSP430F5310, MSP430F5309
MSP430F5308, MSP430F5304
SLAS677E –SEPTEMBER 2010–REVISED NOVEMBER 2013 www.ti.com
JTAG and Spy-Bi-Wire Interface
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST
PARAMETER MIN TYP MAX UNIT
CONDITIONS
f
SBW
Spy-Bi-Wire input frequency 2.2 V, 3 V 0 20 MHz
t
SBW,Low
Spy-Bi-Wire low clock pulse length 2.2 V, 3 V 0.025 15 µs
Spy-Bi-Wire enable time (TEST high to acceptance of first clock
t
SBW, En
2.2 V, 3 V 1 µs
edge)
(1)
t
SBW,Rst
Spy-Bi-Wire return to normal operation time 15 100 µs
2.2 V 0 5 MHz
f
TCK
TCK input frequency - 4-wire JTAG
(2)
3 V 0 10 MHz
R
internal
Internal pulldown resistance on TEST 2.2 V, 3 V 45 60 80 kΩ
(1) Tools accessing the Spy-Bi-Wire interface need to wait for the t
SBW,En
time after pulling the TEST/SBWTCK pin high before applying the
first SBWTCK clock edge.
(2) f
TCK
may be restricted to meet the timing requirements of the module selected.
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