Datasheet
MSP430F5172, MSP430F5152, MSP430F5132
MSP430F5171, MSP430F5151, MSP430F5131
SLAS619J –AUGUST 2010–REVISED OCTOBER 2013
www.ti.com
TD0
TD0 is a 16-bit timer/counter with three capture/compare registers supporting up to 256-MHz / 4-ns resolution.
TD0 can support multiple capture/compares, PWM outputs, and interval timing. TD0 also has extensive interrupt
capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the
capture/compare registers. External fault inputs as well as a external timer counter clear is supported along with
interrupt flags from the TEC0 module.
Table 13. TD0 Signal Connections
INPUT PIN NUMBER OUTPUT PIN NUMBER
DEVICE MODULE MODULE DEVICE
MODULE
RSB DA YFF RSB DA YFF
INPUT INPUT OUTPUT OUTPUT
BLOCK
(40-PIN (38-PIN (49-PIN (40-PIN (38-PIN (49-PIN
SIGNAL SIGNAL SIGNAL SIGNAL
QFN) TSSOP) DSBGA) QFN) TSSOP) DSBGA)
P3.4 - 31 - P3.4 - E1 TD0CLK TDCLK - - -
ACLK ACLK ( ACLK (
ACLK ACLK - - -
(internal) internal) internal)
SMCLK ( SMCLK ( SMCLK (
SMCLK SMCLK - - -
Timer NA NA
internal) internal) internal)
P3.4 - 31 - P3.4 - E1 TD0CLK TDCLK - - -
- - - - CLK0 - - -
P2.4 - 19 P2.4 - 23 P2.4 - D6 TEC0CLR TECXCLR - - -
P1.6 - P1.6 - P1.6 - P1.6 - P1.6 - P1.6 -
TD0.0 CCI0A
11
(1)
15
(1)
A7
(1)
11
(1)
15
(1)
A7
(1)
P3.2 - 29 P3.2 - 33 P3.2 - E2 TD0.0 CCI0B P2.4 - 19 P2.4 - 23 P2.4 - D6
ADC10_A ADC10_A ADC10_A
(internal) (internal) (internal)
- - - V
SS
GND CCR0 TD0 TD0 ADC10SH ADC10SH ADC10SH
Sx = 010b Sx = Sx =
(2)
010b
(2)
010b
(2)
- - - V
CC
V
CC
- - -
TECXFLT
P2.5 - 20 P2.5 - 24 P2.5 - F7 TEC0FLT0 - -
0
P1.7 - P1.7 - P1.7 - P1.7 - P1.7 - P1.7 -
TD0.1 CCI1A
12
(1)
16
(1)
B6
(1)
12
(1)
16
(1)
B6
(1)
CBOUT CBOUT CBOUT
TD0.1 CCI1B PJ.6 - 28 PJ.6 - 32 PJ.6 - E3
(internal) (internal) (internal)
- - - V
SS
GND P2.5 - 20 P2.5 - 24 P2.5 - F7
ADC10_A ADC10_A ADC10_A
CCR1 TD1 TD1
(internal) (internal) (internal)
- - - V
CC
V
CC
ADC10SH ADC10SH ADC10SH
Sx = 011b Sx = 011b Sx = 011b
(2) (2) (2)
TECXFLT
P2.6 - 21 P2.6 - 20 P2.6 - E6 TEC0FLT1 - -
1
P2.0 - P2.0 - P2.0 - P2.0 - P2.0 - P2.0 -
TD0.2 CCI2A
13
(1)
17
(1)
C6
(1)
13
(1)
17
(1)
C6
(1)
ACLK ACLK ACLK
TD0.2 CCI2B P2.6 - 21 P2.6 - 25 P2.6 - E6
(internal) (internal) (internal)
CCR2 TD2 TD2
- - - V
SS
GND - - -
- - - V
CC
V
CC
- - -
TECXFLT
P2.4 - 19 P2.4 - 23 P2.4 - D6 TEC0FLT2 - - -
2
(1) Pins P1.6 for TD0.0, P1.7 for TD0.1, and P2.0 for TD0.2 are optimized for matching.
(2) The ADC10_A trigger is available on MSP430F51x2 devices.
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