Datasheet

MSP430F5172, MSP430F5152, MSP430F5132
MSP430F5171, MSP430F5151, MSP430F5131
www.ti.com SLAS619J –AUGUST 2010–REVISED OCTOBER 2013
Table 46. Port P1 (P1.0 to P1.5) Pin Functions
CONTROL BITS/SIGNALS
(1)
PIN NAME (P1.x) x FUNCTION
P1DIR.x P1SEL.x P1MAP.x CBPD.y
P1.0/ 0 P1.x (I/O) I: 0; O: 1 0 X 0
PM_UCA0CLK/
UCA0CLK/UCB0STE
(2) (3)
0 1 default 0
PM_UCB0STE/
A0/ 31
A0
(4)
X 1 X
INCHx = 0
CB0 CB0 X X X 1 (y = 0)
P1.1/ 1 P1.x (I/O) I: 0; O: 1 0 X 0
PM_UCA0TXD/
PM_UCA0TXD/PM_UCA0SIMO
(2)
0 1 default 0
PM_UCA0SIMO/
A1/ 31
A1
(4)
X 1 X
INCHx = 1
CB1 CB1 X X X 1 (y = 1)
P1.2/ 2 P1.x (I/O) I: 0; O: 1 0 X 0
PM_UCA0RXD/
PM_UCA0RXD/PM_UCA0SOMI
(2)
0 1 default 0
PM_UCA0SOMI/
A2/ 31
A2
(4)
X 1 X
INCHx = 2
CB2 CB2 X X X 1 (y = 2)
P1.3/ 3 P1.x (I/O) I: 0; O: 1 0 X 0
PM_UCB0CLK/
UCB0CLK/UCA0STE
(2)
0 1 default 0
PM_UCA0STE/
A3/ 31
A3
(4)
X 1 X
INCHx = 3
CB3 CB3 X X X 1 (y = 3)
P1.4/ 4 P1.x (I/O) I: 0; O: 1 0 X 0
PM_UCB0SIMO/
PM_UCB0SIMO/PM_UCB0SDA
(2) (5)
0 1 default 0
PM_UCB0SDA/
A4/ 31
A4
(4)
X 1 X
INCHx = 4
CB4 CB4 X X X 1 (y = 4)
P1.5/ 5 P1.x (I/O) I: 0; O: 1 0 X 0
PM_UCB0SOMI/
PM_UCB0SOMI/PM_UCB0SCL
(2) (5)
0 1 default 0
PM_UCB0SCL/
A5/ A5
(4)
31
X 1 X
INCHx = 5
CB5 CB5 X X X 1 (y = 5)
(1) X = Don't care
(2) The pin direction is controlled by the USCI module.
(3) UCA0CLK function takes precedence over UCB0STE function. If the pin is required as UCA0CLK input or output, USCI B0 is forced to
3-wire SPI mode if 4-wire SPI mode is selected.
(4) MSP430F51x2 device only.
(5) If the I2C functionality is selected, the output drives only the logical 0 to V
SS
level.
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