Datasheet
MSP430F5172, MSP430F5152, MSP430F5132
MSP430F5171, MSP430F5151, MSP430F5131
SLAS619J –AUGUST 2010–REVISED OCTOBER 2013
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Wake Up From Low-Power Modes
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
f
MCLK
≥ 4 MHz 3 6.5
Wake-up time from LPM2, PMMCOREVx = 0 = SVSMLRRLx = n
t
FAST-WAKE-UP
µs
1 MHz < f
MCLK
<
LPM3, or LPM4 to active mode (where n = 0, 1, 2, or 3), SVSLFP = 1
4 8.0
4 MHz
Wake-up time from LPM2, PMMCOREVx = 0 = SVSMLRRLx = n
t
SLOW-WAKE-UP
150 165 µs
LPM3, or LPM4 to active mode (where n = 0, 1, 2, or 3), SVSLFP = 0
Wake-up time from LPM4.5 to
t
WAKE-UP LPM5
2 3 ms
active mode
Wake-up time from RST or
t
WAKE-UP-RESET
2 3 ms
BOR event to active mode
Timer_A
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
Internal: SMCLK, ACLK
f
TA
Timer_A input clock frequency External: TACLK 1.8 V, 3 V 25 MHz
Duty cycle = 50% ± 10%
All capture inputs.
t
TA,cap
Timer_A capture timing Minimum pulse duration required for 1.8 V, 3 V 20 ns
capture.
USCI (UART Mode)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
Internal: SMCLK, ACLK
f
USCI
USCI input clock frequency External: UCLK f
SYSTEM
MHz
Duty cycle = 50% ± 10%
Maximum BITCLK clock frequency
f
max,BITCLK
1 MHz
(equals baud rate in MBaud)
(1)
2.2 V 50 150 200
t
τ
UART receive deglitch time ns
3 V 50 150 200
(1) The DCO wake-up time must be considered in LPM3 and LPM4. The wake-up time must be considered in LPMx.5.
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