Datasheet

PJ.5/XIN
PJSEL.5
1
0
PJDIR.5
PJIN.5
EN
ModuleXIN
1
0
ModuleXOUT
PJOUT.5
1
0
DV
SS
DV
CC
PJREN.5
PadLogic
1
PJDS.0
0:Lowdrive
1:Highdrive
D
Bus
Keeper
ToXT1
MSP430F5172, MSP430F5152, MSP430F5132
MSP430F5171, MSP430F5151, MSP430F5131
www.ti.com SLAS619K –AUGUST 2010–REVISED JANUARY 2014
Port PJ.5, Input/Output With Schmitt Trigger
Table 56. Port PJ (PJ.4 and PJ.5) Pin Functions
CONTROL BITS/SIGNALS
(1)
PIN NAME (PJ.x) x FUNCTION
XT1BYPAS
PJDIR.x PJSEL.4 PJSEL.5
S
PJ.4/ 4 0 x
PJ.x (I/O) I: 0; O: 1 X
1 1
XOUT XOUT crystal mode
(2)
X X 1 0
PJ.5/ 5 PJ.x (I/O)
(3)
I: 0; O: 1 X 0 x
XIN XIN crystal mode
(4)
X X 1 0
XIN bypass mode
(4)
X X 1 1
(1) X = Don't care
(2) Setting PJSEL.5 causes the general-purpose I/O to be disabled in crystal mode. When using bypass mode, PJ.4 can be used as
general-purpose I/O.
(3) Setting PJSEL.5 causes the general-purpose I/O to be disabled in crystal mode. When using bypass mode, PJ.4 can be used as
general-purpose I/O.
(4) Setting PJSEL.5 causes the general-purpose I/O to be disabled. Pending the setting of XT1BYPASS, PJ.5 is configured for crystal mode
or bypass mode.
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