Datasheet

P3.4/PM_TD0CLK/PM_MCLK
P3SEL.x
1
0
P3DIR.x
P3IN.x
EN
To Port Mapping
1
0
From Port Mapping
P3OUT.x
1
0
DV
SS
DV
CC
1
D
Pad Logic
To DCO
From Port Mapping
P3SEL.x
1
0
P3DIR.x
P3IN.x
EN
To Port Mapping
1
0
From Port Mapping
P3OUT.x
1
0
DV
SS
DV
CC
1
P3DS.x
0: Low drive
1: High drive
D
Pad Logic
From Port Mapping
Bus
Holder
Direction
0: Input
1: Output
P3REN.x
CBPD.y
P3MAP.x = PMAP_ANALOG
MSP430F5172, MSP430F5152, MSP430F5132
MSP430F5171, MSP430F5151, MSP430F5131
www.ti.com SLAS619K –AUGUST 2010–REVISED JANUARY 2014
Port P3, P3.4, Input/Output With Schmitt Trigger
Table 51. Port P3 (P3.4) Pin Functions
CONTROL BITS/SIGNALS
(1)
PIN NAME (P3.x) x FUNCTION
P3DIR.x P3SEL.x P3MAP.x
P3.4/ 4 P3.x (I/O) I: 0; O: 1 0 X 0
PM_TD0CLK/ TD0 clock input 0 1 default 0
PM_MCLK MCLK output 1 1 default 0
(1) X = Don't care
Copyright © 2010–2014, Texas Instruments Incorporated Submit Documentation Feedback 79
Product Folder Links: MSP430F5172 MSP430F5152 MSP430F5132 MSP430F5171 MSP430F5151 MSP430F5131