Datasheet
MSP430F5172, MSP430F5152, MSP430F5132
MSP430F5171, MSP430F5151, MSP430F5131
www.ti.com
SLAS619K –AUGUST 2010–REVISED JANUARY 2014
TD1
TD1 is a 16-bit timer/counter with three capture/compare registers supporting up to 256-MHz / 4-ns resolution.
TD1 can support multiple capture/compares, PWM outputs, and interval timing. TD1 also has extensive interrupt
capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the
capture/compare registers. External fault inputs as well as a external timer counter clear is supported along with
interrupt flags from the TEC0 module.
Table 14. TD1 Signal Connections
INPUT PIN NUMBER OUTPUT PIN NUMBER
DEVICE MODULE MODULE DEVICE
MODULE
RSB DA YFF RSB DA YFF
INPUT INPUT OUTPUT OUTPUT
BLOCK
(40-PIN (38-PIN (49-PIN (40-PIN (38-PIN (49-PIN
SIGNAL SIGNAL SIGNAL SIGNAL
QFN) TSSOP) DSBGA) QFN) TSSOP) DSBGA)
PJ.6 - 28 PJ.6 - 32 PJ.6 - E5 TD1CLK TDCLK - - -
ACLK ACLK ACLK
ACLK ACLK - - -
(internal) (internal) (internal)
SMCLK(
SMCLK SMCLK SMCLK SMCLK - - -
internal)
Timer NA NA
PJ.6 - 28 PJ.6 - 32 PJ.6 - E5 TD1CLK TDCLK - - -
from TD0
- - - CLK0
(internal)
P2.7 - 22 P2.7 - 26 P2.7 - C5 TEC1CLR TECxCLR - - -
P2.1 - P2.1 - P2.1 - P2.1 -
P2.1 - A2 TD1.0 CCI0A P2.1 - A2
(1)
14
(1)
18
(1)
14
(1)
18
(1)
- - - TD1.0 CCI0B P2.7 - 22 P2.7 - 26 P2.7 - C5
- - - V
SS
GND CCR0 TD0 TD0 - - -
- - - V
CC
V
CC
- - -
TEC1FLT TECXFLT
P3.1 - 24 P3.1 - 28 P3.1 - C6 - - -
0 0
P2.2 - P2.2 - P2.2 - P2.2 -
P2.2 - A3 TD1.1 CCI1A P2.2 - A3
(1)
15
(1)
19
(1)
15
(1)
19
(1)
CBOUT CBOUT CBOUT
TD1.1 CCI1B P3.0 - 23 P3.0 - 27 P3.0 - B6
(internal) (internal) (internal)
CCR1 TD1 TD1
- - - V
SS
GND - - -
- - - V
CC
V
CC
- - -
TEC1FLT TECXFLT
P2.7 - 22 P2.7 - 26 P2.7 - C5 - - -
1 1
P2.3 - P2.3 - P2.3 - P2.3 -
P2.3 - C4 TD1.2 CCI2A P2.3 - C4
(1)
16
(1)
20
(1)
16
(1)
20
(1)
ACLK ACLK ACLK
TD1.2 CCI2B P3.1 - 24 P3.1 - 28 P3.1 - C6
(internal) (internal) (internal)
CCR2 TD2 TD2
- - - V
SS
GND - - -
- - - V
CC
V
CC
- - -
TEC1FLT TECXFLT
P3.0 - 23 P3.0 - 27 P3.0 - B6 - - -
2 2
(1) Pins P2.1 for TD1.0, P2.2 for TD1.1, and P2.3 for TD1.2 are optimized for matching.
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