Datasheet

MSP430F47x3, MSP430F47x4
MIXED SIGNAL MICROCONTROLLER
SLAS545C − MAY 2007 − REVISED MARCH 2011
37
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
crystal oscillator, XT2 oscillator (see Note 5)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
f
XT2,
0
XT2 oscillator crystal frequency,
mode 0
XT2Sx = 0 1.8 V − 3.6 V 0.4 1 MHz
f
XT2,
1
XT2 oscillator crystal frequency,
mode 1
XT2Sx = 1 1.8 V − 3.6 V 1 4 MHz
XT2 ill t t l f
1.8 V − 3.6 V 2 10
f
XT2,
2
XT2 oscillator crystal frequency,
mode 2
XT2Sx = 2
2.2 V − 3.6 V 2 12
MHz
f
XT2
,
2
mo
d
e
2
XT2Sx
2
3.0 V − 3.6 V 2 16
MHz
XT2 ill t l i l l
1.8 V − 3.6 V 0.4 10
f
XT2,
lo
g
ic
XT2 oscillator logic level
square
-
wave input frequency
XT2Sx = 3
2.2 V − 3.6 V 0.4 12
MHz
f
XT2
,
logic
square-wave
i
npu
t
f
requency
XT2Sx
3
3.0 V − 3.6 V 0.4 16
MHz
XT2Sx = 0,
f
XT2
= 1 MHz, C
L,
eff
= 15 pF
2700
OA
XT2
Oscillation allowance for HF
crystals (see Figure 16)
XT2Sx = 1
f
LFXT1,
HF
= 4 MHz,
C
L,
eff
= 15 pF
800
W
crystals
(see
Figure
16)
XT2Sx = 2
f
LFXT1,
HF
= 16 MHz,
C
L,
eff
= 15 pF
300
C
L,
eff
Integrated effective load
capacitance (see Note 1)
(see Note 2) 1 pF
Duty cycle
Measured at P1.4/ACLK,
f
XT2
= 10 MHz
2.2 V/3 V 40 50 60
%
Duty cycle
Measured at P1.4/ACLK,
f
XT2
= 16 MHz
3 V 40 50 60
%
f
Fault,
XT2
Oscillator fault frequency
(see Note 4)
XT2Sx = 3 (see Note 3) 2.2 V/3 V 30 300 kHz
NOTES: 1. Includes parasitic bond and package capacitance (approximately 2pF per pin).
Since the PCB adds additional capacitance it is recommended to verify the correct load by measuring the ACLK frequency. For a
correct setup the effective load capacitance should always match the specification of the used crystal.
2. Requires external capacitors at both terminals. Values are specified by crystal manufacturers.
3. Measured with logic level input frequency but also applies to operation with crystals.
4. Frequencies below the MIN specification will set the fault flag, frequencies above the MAX specification will not set the fault flag.
Frequencies in between might set the flag.
5. To improve EMI on the XT2 oscillator the following guidelines should be observed.
Keep traces as short as possible between the device and the crystal.
Design a good ground plane around the oscillator pins.
Prevent crosstalk from other clock or data lines into oscillator pins XIN and XOUT.
Avoid running PCB traces underneath or adjacent to the XIN and XOUT pins.
Use assembly materials and praxis to avoid any parasitic load on the oscillator XIN and XOUT pins.
If conformal coating is used, ensure that it does not induce capacitive/resistive leakage between the oscillator pins.
Do not route the XOUT line to the JTAG header to support the serial programming adapter as shown in other
documentation. This signal is no longer required for the serial programming adapter.