Datasheet
MSP430F47x
MIXED SIGNAL MICROCONTROLLER
SLAS629A -- MARCH 2009 -- REVISED APRIL 2009
50
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted)
12-bit DAC, reference input specifications
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
V
Reference input
DAC12IR = 0 (see Notes 1 and 2) 2.2 V/3 V AV
CC
/3 AV
CC
+0.2
V
V
REF
R
e
f
e
r
e
n
c
e
i
n
p
u
t
voltage range
DAC12IR = 1 (see Notes 3 and 4)
2.2 V/3 V AV
CC
AV
CC
+0.2
V
Ri
(
V
REF
)
Reference input
r
e
s
i
s
t
a
n
c
e
DAC12IR = 0, SD16VMIDON = 1
(see Note 5)
2.2 V/3 V 20 MΩ
R
i
(
V
R
E
F
)
resistance
DAC12IR = 1, SD16VMIDON = 1 2.2 V/3 V 40 48 56 kΩ
NOTES: 1. For a full-scale output, the reference input voltage can be as high as 1/3 of the maximum output voltage swing (AV
CC
).
2. The maximum voltage applied at reference input voltage terminal V
REF
=[AV
CC
-- V
E(O)
]/[3*(1+E
G
)].
3. For a full-scale output, the reference input voltage can be as high as the maximum output voltage swing (AV
CC
).
4. The maximum voltage applied at reference input voltage terminal V
REF
=[AV
CC
-- V
E(O)
]/(1+E
G
).
5. Characterized, not production tested
12-bit DAC, dynamic specifications (V
REF, DAC12
=AV
CC
, DAC12IR = 1) (see Figure 24 and Figure 25)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
D
A
C
1
2
D
A
C12
_
xD
A
T = 800h,
DAC12AMPx = 0 → {2,3,4} 2.2 V/3 V 60 120
t
ON
D
A
C12
o
n
t
i
m
e
D
A
C
1
2
_
x
D
A
T
=
8
0
0
h
,
Error
V
(
O
)
< ±0.5 LSB
DAC12AMPx = 0 → {5, 6} 2.2 V/3 V 15 30
µs
t
O
N
on-time
E
r
r
o
r
V
(
O
)
<
±
0
.
5
L
S
B
(see Note 1, Figure 24)
DAC12AMPx = 0 → 7 2.2 V/3 V 6 12
µ
s
S
e
t
t
l
i
n
g
t
i
m
e
D
A
C
1
2
x
D
A
T
DAC12AMPx = 2 2.2 V/3 V 100 200
t
S
(
FS
)
Settling time,
f
u
l
l
s
c
a
l
e
D
A
C12
_
xD
A
T=
8
0
h
→
F
7
F
h
→
8
0
h
DAC12AMPx = 3, 5 2.2 V/3 V 40 80
µs
t
S
(
F
S
)
full-scale 80h→ F7Fh→ 80h
DAC12AMPx = 4, 6, 7 2.2 V/3 V 15 30
µ
s
S
e
t
t
l
i
n
g
t
i
m
e
D
A
C12
_
xD
A
T=
DAC12AMPx = 2 2.2 V/3 V 5
t
S
(
C-C
)
Settling time,
c
o
d
e
t
o
c
o
d
e
D
A
C
1
2
_
x
D
A
T
=
3F8h→ 408h→ 3F8h
DAC12AMPx = 3, 5 2.2 V/3 V 2
µs
t
S
(
C
-
C
)
code to code
3
F
8
h
4
0
8
h
3
F
8
h
BF8h→ C08h→ BF8h
DAC12AMPx = 4, 6, 7 2.2 V/3 V 1
µ
s
D
A
C
1
2
x
D
A
T
DAC12AMPx = 2 2.2 V/3 V 0.05 0.12
SR Slew rate
D
A
C12
_
xD
A
T=
8
0
h
→
F
7
F
h
→
8
0
h
DAC12AMPx = 3, 5 2.2 V/3 V 0.35 0.7
V/µs
S
R
S
l
e
w
r
a
t
e
80h→ F7Fh→ 80h
DAC12AMPx = 4, 6, 7 2.2 V/3 V 1.5 2.7
V
/
µ
s
D
A
C
1
2
x
D
A
T
DAC12AMPx = 2 2.2 V/3 V 600
Glitch energy: full-scale
D
A
C12
_
xD
A
T=
8
0
h
→
F
7
F
h
→
8
0
h
DAC12AMPx = 3, 5 2.2 V/3 V 150
nV-s
G
l
i
t
c
h
e
n
e
r
g
y
:
f
u
l
l
s
c
a
l
e
80h→ F7Fh→ 80h
DAC12AMPx = 4, 6, 7 2.2 V/3 V 30
n
V
s
NOTES: 1. R
Load
and C
Load
connected to AV
SS
(not AV
CC
/2) in Figure 24.
2. Slew rate applies to output voltage steps > = 200mV.
R
Load
AV
CC
C
Load
= 100pF
2
DAC Output
R
O/P(DAC12.x)
I
Load
Conversion 1 Conversion 2
V
OUT
Conversion 3
Glitch
Energy
+/-- 1/2 LSB
+/-- 1/2 LSB
t
settleLH
t
settleHL
=3kΩ
Figure 24. Settling Time and Glitch Energy Testing