Datasheet
Table Of Contents
- features
- description
- DEVELOPMENT TOOL SUPPORT
- pin designation, MSP430x4351IPN, MSP430x4361IPN, MSP430x4371IPN
- pin designation, MSP430x435IPZ, MSP430x436IPZ, MSP430x4371IPZ
- pin designation, MSP430x435IPN, MSP430x436IPN, MSP430x437IPN
- pin designation, MSP430x435IPZ, MSP430x436IPZ, MSP430x437IPZ
- pin designation, MSP430x4481IPZ, MSP430x4491IPZ
- pin designation, MSP430x447IPZ, MSP430x448IPZ, MSP430x449IPZ
- MSP430x43x1 functional block diagram
- MSP430x43x functional block diagram
- MSP430x44x1 functional block diagram
- MSP430x44x functional block diagram
- MSP430x43x1 Terminal Functions
- MSP430x43x Terminal Functions
- MSP430x44x1 Terminal Functions
- MSP430x44x Terminal Functions
- short-form description
- CPU
- instruction set
- operating modes
- interrupt vector addresses
- special function registers
- interrupt enable 1 and 2
- interrupt flag register 1 and 2
- module enable registers 1 and 2
- memory organization
- bootstrap loader (BSL)
- flash memory
- peripherals
- digital I/O
- oscillator and system clock
- brownout, supply voltage supervisor (SVS)
- hardware multiplier (MSP430x44x(1) only)
- watchdog timer (WDT)
- USART0
- USART1 (MSP430x44x(1) only)
- Timer_A3
- Timer_B3 (MSP430x43x(1) only)
- Timer_B7 (MSP430x44x(1) only)
- Comparator_A
- ADC12 (not implemented in MSP430x43x1 and MSP430x44x1)
- Basic Timer1
- LCD driver
- peripheral file map
- absolute maximum ratings
- recommended operating conditions
- electrical characteristics
- supply current into AVCC + DVCC excluding external current
- Schmitt-trigger inputs - ports P1, P2, P3, P4, P5, P6
- standard inputs - RST/NMI, JTAG (TCK, TMS, TDI/TCLK)
- inputs Px.x, TAx, TBx
- leakage current
- outputs - ports P1, P2, P3, P4, P5, P6
- output frequency
- wake-up LPM3
- RAM
- LCD
- Comparator_A
- POR/brownout reset (BOR)
- supply voltage supervisor/monitor (SVS)
- DCO
- crystal oscillator, LFXT1 oscillator
- crystal oscillator, XT2 oscillator
- USART0, USART1
- 12-bit ADC, power supply and input range conditions
- 12-bit ADC, external reference
- 12-bit ADC, built-in reference
- 12-bit ADC, timing parameters
- 12-bit ADC, linearity parameters
- 12-bit ADC, temperature sensor and built-in VMID
- flash memory
- JTAG interface
- JTAG fuse
- APPLICATION INFORMATION
- input/output schematics
- port P1, P1.0 to P1.5, input/output with Schmitt trigger
- port P1, P1.6, P1.7, input/output with Schmitt trigger
- port P2, P2.0, P2.4 to P2.5, input/output with Schmitt trigger
- port P2, P2.1 to P2.3, input/output with Schmitt trigger
- port P2, P2.6 to P2.7, input/output with Schmitt trigger
- port P3, P3.0 to P3.3, input/output with Schmitt trigger
- port P3, P3.4 to P3.7, input/output with Schmitt trigger
- port P4, P4.0 to P4.7, input/output with Schmitt trigger
- port P5, P5.0 to P5.1, input/output with Schmitt trigger
- port P5, P5.2 to P5.4, input/output with Schmitt trigger
- port P5, P5.5 to P5.7, input/output with Schmitt trigger
- port P6, P6.0 to P6.6, input/output with Schmitt trigger
- port P6, P6.0 to P6.6, input/output with Schmitt trigger
- port P6, P6.7, input/output with Schmitt trigger
- JTAG pins TMS, TCK, TDI/TCLK, TDO/TDI, input/output with Schmitt trigger or output
- JTAG fuse check mode
- input/output schematics
- Data Sheet Revision History

MSP430x43x1, MSP430x43x, MSP430x44x1, MSP430x44x
MIXED SIGNAL MICROCONTROLLER
SLAS344G − JANUARY 2002 − REVISED OCTOBER 2009
37
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions
MIN NOM MAX UNIT
Supply voltage during program execution
V
CC
(AV
CC
= DV
CC1
= DV
CC2
= V
CC
) (see Note 1)
MSP430F43x(1),
MSP430F44x(1)
1.8 3.6 V
Supply voltage during program execution, SVS enabled, PORON=1
(see Note 1 and Note 2)
V
CC
(AV
CC
= DV
CC1
= DV
CC2
= V
CC
)
MSP430F43x(1),
MSP430F44x(1)
2 3.6 V
Supply voltage during flash memory programming
V
CC
(AV
CC
= DV
CC1
= DV
CC2
= V
CC
) (see Note 1)
MSP430F43x(1),
MSP430F44x(1)
2.7 3.6 V
Supply voltage, V
SS
(AV
SS
= DV
SS1
= DV
SS2
= V
SS
) 0 0 V
Operating free-air temperature range, T
A
MSP430x43x(1),
MSP430x44x(1)
−40 85 °C
LF selected,
XTS_FLL=0
Watch crystal 32.768 kHz
LFXT1 crystal frequency, f
(LFXT1)
(see Note 3)
XT1 selected,
XTS_FLL=1
Ceramic resonator 450 8000 kHz
(see
Note
3)
XT1 selected,
XTS_FLL=1
Crystal 1000 8000 kHz
XT2 crystal frequency f
Ceramic resonator 450 8000
kHz
XT2 crystal frequency, f
(XT2)
Crystal 1000 8000
kHz
Processor frequency (signal MCLK) f
V
CC
= 1.8 V DC 4.15
MHz
Processor frequency (signal MCLK), f
(System)
V
CC
= 3.6 V DC 8
MHz
NOTES: 1. It is recommended to power AV
CC
and DV
CC
from the same source. A maximum difference of 0.3 V between AV
CC
and DV
CC
can
be tolerated during power up and operation.
2. The minimum operating supply voltage is defined according to the trip point where POR is going active by decreasing the supply
voltage. POR is going inactive when the supply voltage is raised above the minimum supply voltage plus the hysteresis of the SVS
circuitry.
3. In LF mode, the LFXT1 oscillator requires a watch crystal. In XT1 mode, LFXT1 accepts a ceramic resonator or a crystal.
1.8 3.62.7 3
4.15 MHz
8 MHz
Supply Voltage − V
Supply voltage range, ’F43x(1)/’F44x(1),
during flash memory programming
Supply voltage range,
’F43x(1)/’F44x(1), during
program execution
f
System
(MHz)
Figure 1. Frequency vs Supply Voltage, MSP430F43x(1) or MSP430F44x(1)