Datasheet
Table Of Contents
- features
- description
- pin designation, DL package
- pin designation, RGZ package
- functional block diagram
- Terminal Functions
- short-form description
- absolute maximum ratings
- recommended operating conditions
- electrical characteristics
- supply current into AVCC + DVCC
- SCHMITT-trigger inputs
- inputs Px.x, TAx
- leakage current
- outputs
- output frequency
- wake-up LPM3
- RAM
- LCD_A
- POR/brownout reset
- DCO
- crystal oscillator, LFXT1 oscillator
- SD16_A, power supply and recommended operating conditions
- SD16_A, input range
- SD16_A, performance (fSD16 = 30kHz, SD16REFON = 1, SD16BUFx = 01)
- SD16_A, performance (fSD16 = 1MHz, SD16OSRx = 256, SD16REFON = 1, SD16BUFx = 00)
- SD16_A, temperature sensor
- SD16_A, built-in voltage reference
- SD16_A, reference output buffer
- SD16_A, external reference input
- 12-bit DAC, supply specifications
- 12-bit DAC, linearity specifications
- 12-bit DAC, output specifications
- 12-bit DAC, reference input specifications
- 12-bit DAC, dynamic specifications
- Flash Memory
- JTAG Interface
- JTAG Fuse
- input/output schematics
- Port P1 pin schematic: P1.0, P1.1, input/output with Schmitt−trigger
- Port P1 pin schematic: P1.2, input/output with Schmitt−trigger and analog functions
- Port P1 pin schematic: P1.3, P1.5, P1.7, input/output with Schmitt−trigger and analog functions
- Port P1 pin schematic: P1.4, input/output with Schmitt−trigger and analog functions
- Port P1 pin schematic: P1.6, input/output with Schmitt−trigger and analog functions
- Port P2 pin schematic: P2.0 to P2.7, input/output with Schmitt−trigger, LCD and analog functions
- Port P5 pin schematic: P5.0, P5.1, P5.5 to P5.7, input/output with Schmitt−trigger and LCDfunctions
- Port P5 pin schematic: P5.2 to P5.4, input/output with Schmitt−trigger and LCD functions
- Port P6 pin schematic: P6.0, P6.2, input/output with Schmitt−trigger and analog functions
- Port P6 pin schematic: P6.1, P6.3, input/output with Schmitt−trigger and analog functions
- Port P6 pin schematic: P6.4 to P6.7, input/output with Schmitt−trigger and analog functions
- JTAG pins TMS, TCK, TDI/TCLK, TDO/TDI, input/output with Schmitt-trigger or output
- JTAG fuse check mode
- Data Sheet Revision History
- Corrections to MSP430F42x0 Data Sheet (SLAS455D)

MSP430F42x0
MIXED SIGNAL MICROCONTROLLER
SLAS455D − MARCH 2005 − REVISED APRIL 2007
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
interrupt vector addresses
The interrupt vectors and the power-up starting address are located in the address range 0FFFFh−0FFE0h. The
vector contains the 16-bit address of the appropriate interrupt-handler instruction sequence.
Table 3. Interrupt Sources, Flags, and Vectors of MSP430F42x0 Configuration
INTERRUPT SOURCE INTERRUPT FLAG SYSTEM INTERRUPT
WORD
ADDRESS
PRIORITY
Power-Up
External Reset
Watchdog
Flash Memory
PC Out-of-Range (see Note 4)
WDTIFG
KEYV
(see Note 1)
Reset 0FFFEh 15, highest
NMI
Oscillator Fault
Flash Memory Access Violation
NMIIFG (see Notes 1 and 3)
OFIFG (see Notes 1 and 3)
ACCVIFG (see Notes 1 and 3)
(Non)maskable
(Non)maskable
(Non)maskable
0FFFCh 14
0FFFAh 13
SD16_A
SD16CCTLx SD16OVIFG,
SD16CCTLx SD16IFG
(see Notes 1 and 2)
Maskable 0FFF8h 12
0FFF6h 11
Watchdog Timer WDTIFG Maskable 0FFF4h 10
0FFF2h 9
0FFF0h 8
0FFEEh 7
Timer_A3 TACCR0 CCIFG0 (see Note 2) Maskable 0FFECh 6
Timer_A3
TACCR1 CCIFG1 and TACCR2 CCIFG2,
TAIFG (see Notes 1 and 2)
Maskable 0FFEAh 5
I/O Port P1 (Eight Flags) P1IFG.0 to P1IFG.7 (see Notes 1 and 2) Maskable 0FFE8h 4
DAC12 DAC12_0IFG
(see Note 2)
Maskable 0FFE6h 3
0FFE4h 2
I/O Port P2 (Eight Flags) P2IFG.0 to P2IFG.7 (see Notes 1 and 2) Maskable 0FFE2h 1
Basic Timer1 BTIFG Maskable 0FFE0h 0, lowest
NOTES: 1. Multiple source flags
2. Interrupt flags are located in the module.
3. (Non)maskable: the individual interrupt-enable bit can disable an interrupt event, but the general-interrupt enable cannot
disable it.
4. A reset is generated if the CPU tries to fetch instructions from within the module register memory address range (0h−01FFh) or from
within unused address ranges (MSP430F4270, MSP430F4260: from 0300h to 0BFFh and from 01100h to 07FFFh,
MSP430F4250: from 0300h to 0BFFh and from 01100h to 0BFFFh).