Datasheet
Table Of Contents
- features
- description
- pin designation, DL package
- pin designation, RGZ package
- functional block diagram
- Terminal Functions
- short-form description
- absolute maximum ratings
- recommended operating conditions
- electrical characteristics
- supply current into AVCC + DVCC
- SCHMITT-trigger inputs
- inputs Px.x, TAx
- leakage current
- outputs
- output frequency
- wake-up LPM3
- RAM
- LCD_A
- POR/brownout reset
- DCO
- crystal oscillator, LFXT1 oscillator
- SD16_A, power supply and recommended operating conditions
- SD16_A, input range
- SD16_A, performance (fSD16 = 30kHz, SD16REFON = 1, SD16BUFx = 01)
- SD16_A, performance (fSD16 = 1MHz, SD16OSRx = 256, SD16REFON = 1, SD16BUFx = 00)
- SD16_A, temperature sensor
- SD16_A, built-in voltage reference
- SD16_A, reference output buffer
- SD16_A, external reference input
- 12-bit DAC, supply specifications
- 12-bit DAC, linearity specifications
- 12-bit DAC, output specifications
- 12-bit DAC, reference input specifications
- 12-bit DAC, dynamic specifications
- Flash Memory
- JTAG Interface
- JTAG Fuse
- input/output schematics
- Port P1 pin schematic: P1.0, P1.1, input/output with Schmitt−trigger
- Port P1 pin schematic: P1.2, input/output with Schmitt−trigger and analog functions
- Port P1 pin schematic: P1.3, P1.5, P1.7, input/output with Schmitt−trigger and analog functions
- Port P1 pin schematic: P1.4, input/output with Schmitt−trigger and analog functions
- Port P1 pin schematic: P1.6, input/output with Schmitt−trigger and analog functions
- Port P2 pin schematic: P2.0 to P2.7, input/output with Schmitt−trigger, LCD and analog functions
- Port P5 pin schematic: P5.0, P5.1, P5.5 to P5.7, input/output with Schmitt−trigger and LCDfunctions
- Port P5 pin schematic: P5.2 to P5.4, input/output with Schmitt−trigger and LCD functions
- Port P6 pin schematic: P6.0, P6.2, input/output with Schmitt−trigger and analog functions
- Port P6 pin schematic: P6.1, P6.3, input/output with Schmitt−trigger and analog functions
- Port P6 pin schematic: P6.4 to P6.7, input/output with Schmitt−trigger and analog functions
- JTAG pins TMS, TCK, TDI/TCLK, TDO/TDI, input/output with Schmitt-trigger or output
- JTAG fuse check mode
- Data Sheet Revision History
- Corrections to MSP430F42x0 Data Sheet (SLAS455D)
MSP430F42x0
MIXED SIGNAL MICROCONTROLLER
SLAS455D − MARCH 2005 − REVISED APRIL 2007
54
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
JTAG fuse check mode
MSP430 devices that have the fuse on the TDI/TCLK terminal have a fuse check mode that tests the continuity
of the fuse the first time the JTAG port is accessed after a power-on reset (POR). When activated, a fuse check
current (I
(TF)
) of 1 mA at 3 V can flow from the TDI/TCLK pin to ground if the fuse is not burned. Care must be
taken to avoid accidentally activating the fuse check mode and increasing overall system power consumption.
Activation of the fuse check mode occurs with the first negative edge on the TMS pin after power up or if the
TMS is being held low during power up. The second positive edge on the TMS pin deactivates the fuse check
mode. After deactivation, the fuse check mode remains inactive until another POR occurs. After each POR the
fuse check mode has the potential to be activated.
The fuse check current only flows when the fuse check mode is active and the TMS pin is in a low state (see
Figure 19). Therefore, the additional current flow can be prevented by holding the TMS pin high (default
condition). The JTAG pins are terminated internally and therefore do not require external termination.
Time TMS Goes Low After POR
TMS
I
(TF)
I
TDI/TCLK
Figure 19. Fuse Check Mode Current