Datasheet
Table Of Contents
- features
- description
- pin designation, DL package
- pin designation, RGZ package
- functional block diagram
- Terminal Functions
- short-form description
- absolute maximum ratings
- recommended operating conditions
- electrical characteristics
- supply current into AVCC + DVCC
- SCHMITT-trigger inputs
- inputs Px.x, TAx
- leakage current
- outputs
- output frequency
- wake-up LPM3
- RAM
- LCD_A
- POR/brownout reset
- DCO
- crystal oscillator, LFXT1 oscillator
- SD16_A, power supply and recommended operating conditions
- SD16_A, input range
- SD16_A, performance (fSD16 = 30kHz, SD16REFON = 1, SD16BUFx = 01)
- SD16_A, performance (fSD16 = 1MHz, SD16OSRx = 256, SD16REFON = 1, SD16BUFx = 00)
- SD16_A, temperature sensor
- SD16_A, built-in voltage reference
- SD16_A, reference output buffer
- SD16_A, external reference input
- 12-bit DAC, supply specifications
- 12-bit DAC, linearity specifications
- 12-bit DAC, output specifications
- 12-bit DAC, reference input specifications
- 12-bit DAC, dynamic specifications
- Flash Memory
- JTAG Interface
- JTAG Fuse
- input/output schematics
- Port P1 pin schematic: P1.0, P1.1, input/output with Schmitt−trigger
- Port P1 pin schematic: P1.2, input/output with Schmitt−trigger and analog functions
- Port P1 pin schematic: P1.3, P1.5, P1.7, input/output with Schmitt−trigger and analog functions
- Port P1 pin schematic: P1.4, input/output with Schmitt−trigger and analog functions
- Port P1 pin schematic: P1.6, input/output with Schmitt−trigger and analog functions
- Port P2 pin schematic: P2.0 to P2.7, input/output with Schmitt−trigger, LCD and analog functions
- Port P5 pin schematic: P5.0, P5.1, P5.5 to P5.7, input/output with Schmitt−trigger and LCDfunctions
- Port P5 pin schematic: P5.2 to P5.4, input/output with Schmitt−trigger and LCD functions
- Port P6 pin schematic: P6.0, P6.2, input/output with Schmitt−trigger and analog functions
- Port P6 pin schematic: P6.1, P6.3, input/output with Schmitt−trigger and analog functions
- Port P6 pin schematic: P6.4 to P6.7, input/output with Schmitt−trigger and analog functions
- JTAG pins TMS, TCK, TDI/TCLK, TDO/TDI, input/output with Schmitt-trigger or output
- JTAG fuse check mode
- Data Sheet Revision History
- Corrections to MSP430F42x0 Data Sheet (SLAS455D)
MSP430F42x0
MIXED SIGNAL MICROCONTROLLER
SLAS455D − MARCH 2005 − REVISED APRIL 2007
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MSP430F42x0 functional block diagram
DV
CC
DV
SS
AV
CC
AV
SS
RST/NMI
P2
Flash
32KB
24KB
16KB
RAM
256B
Watchdog
Timer+
WDT+
15/16-Bit
Port 2
8 I/O
Interrupt
Capability
POR/
Brownout
Basic
Timer 1
1 Interrupt
Vector
LCD_A
56
Segments
1,2,3,4 MUX
f
LCD
8
MCLK
XOUT
JTAG
Interface
XIN
SMCLK
ACLK
MDB
MAB
Emulation
P3
Port 3
8 I/O
8
Module
P1
Port 1
8 I/O
Interrupt
Capability
8
P4
Port 4
8 I/O
8
SD16_A
16 Bit
Oscillator
FLL+
8 MHz
CPU
incl. 16
Registers
P5
Port 5
8 I/O
8
P6
Port 6
8 I/O
8
Timer_A3
3 CC Reg
DAC12
12 Bit
1 Channel
Voltage Out