Datasheet
Table Of Contents
- features
- description
- pin designation, DL package
- pin designation, RGZ package
- functional block diagram
- Terminal Functions
- short-form description
- absolute maximum ratings
- recommended operating conditions
- electrical characteristics
- supply current into AVCC + DVCC
- SCHMITT-trigger inputs
- inputs Px.x, TAx
- leakage current
- outputs
- output frequency
- wake-up LPM3
- RAM
- LCD_A
- POR/brownout reset
- DCO
- crystal oscillator, LFXT1 oscillator
- SD16_A, power supply and recommended operating conditions
- SD16_A, input range
- SD16_A, performance (fSD16 = 30kHz, SD16REFON = 1, SD16BUFx = 01)
- SD16_A, performance (fSD16 = 1MHz, SD16OSRx = 256, SD16REFON = 1, SD16BUFx = 00)
- SD16_A, temperature sensor
- SD16_A, built-in voltage reference
- SD16_A, reference output buffer
- SD16_A, external reference input
- 12-bit DAC, supply specifications
- 12-bit DAC, linearity specifications
- 12-bit DAC, output specifications
- 12-bit DAC, reference input specifications
- 12-bit DAC, dynamic specifications
- Flash Memory
- JTAG Interface
- JTAG Fuse
- input/output schematics
- Port P1 pin schematic: P1.0, P1.1, input/output with Schmitt−trigger
- Port P1 pin schematic: P1.2, input/output with Schmitt−trigger and analog functions
- Port P1 pin schematic: P1.3, P1.5, P1.7, input/output with Schmitt−trigger and analog functions
- Port P1 pin schematic: P1.4, input/output with Schmitt−trigger and analog functions
- Port P1 pin schematic: P1.6, input/output with Schmitt−trigger and analog functions
- Port P2 pin schematic: P2.0 to P2.7, input/output with Schmitt−trigger, LCD and analog functions
- Port P5 pin schematic: P5.0, P5.1, P5.5 to P5.7, input/output with Schmitt−trigger and LCDfunctions
- Port P5 pin schematic: P5.2 to P5.4, input/output with Schmitt−trigger and LCD functions
- Port P6 pin schematic: P6.0, P6.2, input/output with Schmitt−trigger and analog functions
- Port P6 pin schematic: P6.1, P6.3, input/output with Schmitt−trigger and analog functions
- Port P6 pin schematic: P6.4 to P6.7, input/output with Schmitt−trigger and analog functions
- JTAG pins TMS, TCK, TDI/TCLK, TDO/TDI, input/output with Schmitt-trigger or output
- JTAG fuse check mode
- Data Sheet Revision History
- Corrections to MSP430F42x0 Data Sheet (SLAS455D)

MSP430F42x0
MIXED SIGNAL MICROCONTROLLER
SLAS455D − MARCH 2005 − REVISED APRIL 2007
35
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
12-bit DAC, output specifications
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
No Load, V
REF,DAC12
= AV
CC
,
DAC12_xDAT = 0h, DAC12IR = 1,
DAC12AMPx = 7
2.2V/3V 0 0.005
V
Output voltage
range
No Load, V
REF,DAC12
= AV
CC
,
DAC12_xDAT = 0FFFh, DAC12IR = 1,
DAC12AMPx = 7
2.2V/3V AV
CC
−0.05 AV
CC
V
V
O
range
(see Note 1,
Figure 15)
R
Load
= 3 kΩ, V
REF,DAC12
= AV
CC
,
DAC12_xDAT = 0h, DAC12IR = 1,
DAC12AMPx = 7
2.2V/3V 0 0.1
V
R
Load
= 3 kΩ, V
REF,DAC12
= AV
CC
,
DAC12_xDAT = 0FFFh, DAC12IR = 1,
DAC12AMPx = 7
2.2V/3V AV
CC
−0.13 AV
CC
C
L(DAC12)
Max DAC12
load capacitance
2.2V/3V 100 pF
I
Max DAC12
2.2V −0.5 +0.5
mA
I
L(DAC12)
Max
DAC12
load current
3V −1.0 +1.0
mA
R
Load
= 3 kΩ, V
O/P(DAC12)
< 0.3 V,
DAC12AMPx = 2, DAC12_xDAT = 0h
2.2V/3V 150 250
R
O/P(DAC12)
Output
Resistance
(see Figure 15)
R
Load
= 3 kΩ,
V
O/P(DAC12)
> AV
CC
−0.3 V
DAC12_xDAT = 0FFFh
2.2V/3V 150 250
Ω
(see
Figure
15)
R
Load
= 3 kΩ,
0.3V ≤ V
O/P(DAC12)
≤ AV
CC
− 0.3V
2.2V/3V 1 4
NOTES: 1. Data is valid after the offset calibration of the output amplifier.
R
O/P(DAC12_x)
Max
0.3
AV
CC
AV
CC
−0.3V
V
OUT
Min
R
Load
AV
CC
C
Load
= 100pF
2
I
Load
DAC12
O/P(DAC12_x)
Figure 15. DAC12_x Output Resistance Tests