Datasheet

MSP430F42x0
MIXED SIGNAL MICROCONTROLLER
SLAS455D − MARCH 2005 − REVISED APRIL 2007
33
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
12-bit DAC, linearity specifications (see Figure 12)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
Resolution (12-bit Monotonic) 12 bits
INL
Integral nonlinearity
(see Note 1)
V
REF,DAC12
= 1.2V
DAC12AMPx = 7, DAC12IR = 1
2.7V ±2.0 ±8.0 LSB
DNL
Differential nonlinearity
(see Note 1)
V
REF,DAC12
= 1.2V
DAC12AMPx = 7, DAC12IR = 1
2.7V ±0.4 ±1.0 LSB
E
O
Offset voltage w/o
calibration
(see Notes 1, 2)
V
REF,DAC12
= 1.2V
DAC12AMPx = 7, DAC12IR = 1
2.7V ±20
mV
Offset voltage with
calibration
(see Notes 1, 2)
V
REF,DAC12
= 1.2V
DAC12AMPx = 7, DAC12IR = 1
2.7V ±2.5
mV
d
E(O)
/d
T
Offset error
temperature coefficient
(see Note 1)
2.7V ±30 μV/C
E
G
Gain error (see Note 1) V
REF,DAC12
= 1.2V 2.7V ±3.50 % FSR
d
E(G)
/d
T
Gain temperature
coefficient (see Note 1)
2.7V 10
ppm of
FSR/°C
Time for offset calibration
DAC12AMPx=2 2.7V 100
t
Offset_Cal
Time for offset calibration
(see Note 3)
DAC12AMPx=3,5 2.7V 32
ms
t
Offset
_
Cal
(see Note 3)
DAC12AMPx=4,6,7 2.7V 6
ms
NOTES: 1. Parameters calculated from the best-fit curve from 0x0A to 0xFFF. The best-fit curve method is used to deliver coefficients “a” and
“b” of the first order equation: y = a + b*x. V
DAC12_xOUT
= E
O
+ (1 + E
G
) * (V
REF,DAC12
/4095) * DAC12_xDAT, DAC12IR = 1.
2. The offset calibration works on the output operational amplifier. Offset Calibration is triggered setting bit DAC12CALON
3. The offset calibration can be done if DAC12AMPx = {2, 3, 4, 5, 6, 7}. The output operational amplifier is switched off with
DAC12AMPx ={0, 1}. It is recommended that the DAC12 module be configured prior to initiating calibration. Port activity during
calibration may effect accuracy and is not recommended.
Positive
Negative
V
R+
Gain Error
Offset Error
DAC Code
DAC V
OUT
Ideal transfer
function
R
Load
=
AV
CC
C
Load
= 100pF
2
DAC Output
Figure 12. Linearity Test Load Conditions and Gain/Offset Definition