Datasheet
Table Of Contents
- features
- description
- pin designation, DL package
- pin designation, RGZ package
- functional block diagram
- Terminal Functions
- short-form description
- absolute maximum ratings
- recommended operating conditions
- electrical characteristics
- supply current into AVCC + DVCC
- SCHMITT-trigger inputs
- inputs Px.x, TAx
- leakage current
- outputs
- output frequency
- wake-up LPM3
- RAM
- LCD_A
- POR/brownout reset
- DCO
- crystal oscillator, LFXT1 oscillator
- SD16_A, power supply and recommended operating conditions
- SD16_A, input range
- SD16_A, performance (fSD16 = 30kHz, SD16REFON = 1, SD16BUFx = 01)
- SD16_A, performance (fSD16 = 1MHz, SD16OSRx = 256, SD16REFON = 1, SD16BUFx = 00)
- SD16_A, temperature sensor
- SD16_A, built-in voltage reference
- SD16_A, reference output buffer
- SD16_A, external reference input
- 12-bit DAC, supply specifications
- 12-bit DAC, linearity specifications
- 12-bit DAC, output specifications
- 12-bit DAC, reference input specifications
- 12-bit DAC, dynamic specifications
- Flash Memory
- JTAG Interface
- JTAG Fuse
- input/output schematics
- Port P1 pin schematic: P1.0, P1.1, input/output with Schmitt−trigger
- Port P1 pin schematic: P1.2, input/output with Schmitt−trigger and analog functions
- Port P1 pin schematic: P1.3, P1.5, P1.7, input/output with Schmitt−trigger and analog functions
- Port P1 pin schematic: P1.4, input/output with Schmitt−trigger and analog functions
- Port P1 pin schematic: P1.6, input/output with Schmitt−trigger and analog functions
- Port P2 pin schematic: P2.0 to P2.7, input/output with Schmitt−trigger, LCD and analog functions
- Port P5 pin schematic: P5.0, P5.1, P5.5 to P5.7, input/output with Schmitt−trigger and LCDfunctions
- Port P5 pin schematic: P5.2 to P5.4, input/output with Schmitt−trigger and LCD functions
- Port P6 pin schematic: P6.0, P6.2, input/output with Schmitt−trigger and analog functions
- Port P6 pin schematic: P6.1, P6.3, input/output with Schmitt−trigger and analog functions
- Port P6 pin schematic: P6.4 to P6.7, input/output with Schmitt−trigger and analog functions
- JTAG pins TMS, TCK, TDI/TCLK, TDO/TDI, input/output with Schmitt-trigger or output
- JTAG fuse check mode
- Data Sheet Revision History
- Corrections to MSP430F42x0 Data Sheet (SLAS455D)

MSP430F42x0
MIXED SIGNAL MICROCONTROLLER
SLAS455D − MARCH 2005 − REVISED APRIL 2007
27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted)
crystal oscillator, LFXT1 oscillator (see Notes 1 and 2)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OSCCAPx = 0h, V
CC
= 2.2 V / 3 V 0
C
Inte
g
rated input capacitance
OSCCAPx = 1h, V
CC
= 2.2 V / 3 V 10
pF
C
XIN
Integrated
input
capacitance
(see Note 4)
OSCCAPx = 2h, V
CC
= 2.2 V / 3 V 14
pF
OSCCAPx = 3h, V
CC
= 2.2 V / 3 V 18
OSCCAPx = 0h, V
CC
= 2.2 V / 3 V 0
C
Inte
g
rated output capacitance
OSCCAPx = 1h, V
CC
= 2.2 V / 3 V 10
pF
C
XOUT
Integrated
output
capacitance
(see Note 4)
OSCCAPx = 2h, V
CC
= 2.2 V / 3 V 14
pF
OSCCAPx = 3h, V
CC
= 2.2 V / 3 V 18
V
IL
Input levels at XIN
V 2 2 V/3 V (see Note 3)
V
SS
0.2×V
CC
V
V
IH
Input levels at XIN V
CC
= 2.2 V/3 V (see Note 3)
0.8×V
CC
V
CC
V
NOTES: 1. The parasitic capacitance from the package and board may be estimated to be 2 pF. The effective load capacitor for the crystal is
(C
XIN
xC
XOUT
) / (C
XIN
+ C
XOUT
). This is independent of XTS_FLL.
2. To improve EMI on the low-power LFXT1 oscillator, particularly in the LF mode (32 kHz), the following guidelines should be observed.
− Keep as short of a trace as possible between the ’F42x0 and the crystal.
− Design a good ground plane around the oscillator pins.
− Prevent crosstalk from other clock or data lines into oscillator pins XIN and XOUT.
− Avoid running PCB traces underneath or adjacent to the XIN and XOUT pins.
− Use assembly materials and praxis to avoid any parasitic load on the oscillator XIN and XOUT pins.
− If conformal coating is used, ensure that it does not induce capacitive/resistive leakage between the oscillator pins.
− Do not route the XOUT line to the JTAG header to support the serial programming adapter as shown in other
documentation. This signal is no longer required for the serial programming adapter.
3. Applies only when using an external logic-level clock source. XTS_FLL must be set. Not applicable when using a crystal or
resonator.
4. External capacitance is recommended for precision real-time clock applications; OSCCAPx = 0h.