Datasheet

MSP430F42x
MIXED SIGNAL MICROCONTROLLER
SLAS421A − APRIL 2004 − REVISED JUNE 2007
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
Schmitt-trigger inputs − Ports P1 and P2; RST/NMI; JTAG: TCK, TMS, TDI/TCLK, TDO/TDI
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
IT+
Positive-going input threshold voltage V
CC
= 3 V 1.5 1.98 V
V
IT−
Negative-going input threshold voltage V
CC
= 3 V 0.9 1.3 V
V
hys
Input voltage hysteresis (V
IT+
− V
IT−
) V
CC
= 3 V 0.45 1 V
inputs Px.x, TAx
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
t
External interrupt timing
Port P1, P2: P1.x to P2.x, External tri
gg
er si
g
nal
3 V 1.5 cycle
t
(int)
External interrupt timing
Port
P1
,
P2:
P1
.
x
to
P2
.
x
,
External
trigger
signal
for the interrupt flag, (see Note 1)
3 V 50 ns
t
(cap)
Timer_A, capture timing TAx 3 V 50 ns
f
(TAext)
Timer_A clock frequency
externally applied to pin
TACLK, INCLK t
(H)
= t
(L)
3 V 10 MHz
f
(TAint)
Timer_A clock frequency SMCLK or ACLK signal selected 3 V 10 MHz
NOTES: 1. The external signal sets the interrupt flag every time the minimum t
(int)
cycle and time parameters are met. It may be set even with
trigger signals shorter than t
(int)
. Both the cycle and timing specifications must be met to ensure the flag is set. t
(int)
is measured in
MCLK cycles.
leakage current (see Note 1)
PARAMETER TEST CONDITIONS MIN NOM MAX UNIT
I
lkg(P1.x)
Leaka
g
e
Port P1 Port 1: V
(P1.x)
(see Note 2)
V =3V
±50
nA
I
lkg(P2.x)
Leakage
current
Port P2 Port 2: V
(P2.x)
(see Note 2)
V
CC
= 3 V
±50
nA
NOTES: 1. The leakage current is measured with V
SS
or V
CC
applied to the corresponding pin(s), unless otherwise noted.
2. The port pin must be selected as an input.
outputs − Ports P1 and P2
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
High level output voltage
I
OH(max)
= −1.5 mA, V
CC
= 3 V, See Note 1 V
CC
−0.25 V
CC
V
V
OH
High-level output voltage
I
OH(max)
= −6 mA, V
CC
= 3 V, See Note 2 V
CC
−0.6 V
CC
V
V
Low level output voltage
I
OL(max)
= 1.5 mA, V
CC
= 3 V, See Note 1 V
SS
V
SS
+0.25
V
V
OL
Low-level output voltage
I
OL(max)
= 6 mA, V
CC
= 3 V, See Note 2 V
SS
V
SS
+0.6
V
NOTES: 1. The maximum total current, I
OH(max)
and I
OL(max),
for all outputs combined, should not exceed ±12 mA to satisfy the
maximum specified voltage drop.
2. The maximum total current, I
OH(max)
and I
OL(max),
for all outputs combined, should not exceed ±48 mA to satisfy the
maximum specified voltage drop.
output frequency
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
f
Px.y
(1 ≤ x ≤ 2, 0 ≤ y ≤ 7)
C
L
= 20 pF,
I
L
= ± 1.5mA
V
CC
= 3 V DC 12 MHz
f
ACLK,
f
MCLK,
f
SMCLK
P1.1/TA0/MCLK
P1.5/TACLK/ACLK/S28
C
L
= 20 pF V
CC
= 3 V 12 MHz
P1.5/TACLK/ACLK/
f
ACLK
= f
LFXT1
= f
XT1
40% 60%
P1
.
5/TACLK/ACLK/
S28, C
L
= 20 pF
f
ACLK
= f
LFXT1
= f
LF
30% 70%
t
Xdc
Duty cycle of output frequency
S28,
C
L
20
pF
V
CC
= 3 V
f
ACLK
= f
LFXT1
50%
t
Xdc
Duty
cycle
of
output
frequency
P1.1/TA0/MCLK,
C
L
= 20 pF,
V
CC
= 3 V
f
MCLK
= f
DCOCLK
50%−
15 ns
50%
50%+
15 ns