Datasheet
Table Of Contents
- features
- description
- Available Options
- pin designation
- functional block diagram
- Terminal Functions
- short-form description
- absolute maximum ratings
- recommended operating conditions
- electrical characteristics over recommended operating free-air temperature
- supply current into AVCC + DVCC excluding external
- current consumption of active mode versus system frequency
- current consumption of active mode versus supply voltage
- Schmitt-trigger inputs -- Ports P1 and P2, RST/NMI, JTAG (TCK, TMS, TDI/TCLK, TDO/TDI)
- inputs Px.x, TAx
- leakage current
- outputs -- Ports P1 and P2
- output frequency
- wake-up LPM3
- RAM
- LCD
- USART0
- POR brownout, reset
- SVS (supply voltage supervisor/monitor)
- DCO
- crystal oscillator, LFXT1 oscillator
- SD16, power supply and recommended operating conditions
- SD16, analog input range
- SD16, analog performance (fSD16 = 1MHz, SD16OSRx = 256, SD16REFON = 1)
- SD16, built-in voltage reference
- SD16, built-in reference output buffer
- SD16, external reference input
- flash memory
- JTAG interface
- JTAG fuse
- Application Information
- input/output schematic
- Port P1, P1.0 to P1.1, input/output with Schmitt trigger
- Port P1, P1.2 to P1.7, input/output with Schmitt trigger
- Port P2, P2.0 to P2.1, input/output with Schmitt trigger
- Port P2, P2.2 to P2.5, input/output with Schmitt trigger
- Port P2, unbonded GPIOs P2.6 and P2.7
- JTAG pins (TMS, TCK, TDI/TCLK, TDO/TDI), input/output with Schmitt trigger or output
- JTAG fuse check mode
- input/output schematic
- Data Sheet Revision History

MSP430F42xA
MIXED SIGNAL MICROCONTROLLER
SLAS587 -- FEBRUARY 2008
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
Schmitt-trigger inputs -- Ports P1 and P2, RST/NMI, JTAG ( TCK, TMS, TDI/TCLK, TDO/TDI)
PARAMETER V
CC
MIN TYP MAX UNIT
V
IT+
Positive-going input threshold voltage 3V 1.5 1.98 V
V
IT--
Negative-going input threshold voltage 3V 0.9 1.3 V
V
hys
Input voltage hysteresis (V
IT+
-- V
IT--
) 3V 0.45 1 V
inputs Px.x, TAx
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
t
E
x
t
e
r
n
a
l
i
n
t
e
r
r
u
p
t
t
i
m
i
n
g
Port P1, P2: P1.
x
to P2.
x
,E
x
ternal tri
g
g
er si
g
nal
3V 1.5 cycle
t
(int)
External interrupt timing
P
o
r
t
P
1
,
P
2
:
P
1
.
x
t
o
P
2
.
x
,
E
x
t
e
r
n
a
l
t
r
i
g
g
e
r
s
i
g
n
a
l
for the interrupt flag, (see Note 1)
3V 50 ns
t
(cap)
Timer_A, capture timing TAx 3V 50 ns
f
(TAext)
Timer_A clock frequency
externally applied to pin
TACLK, INCLK t
(H)
=t
(L)
3V 10 MHz
f
(TAint)
Timer_A clock frequency SMCLK or ACLK signal selected 3V 10 MHz
NOTES: 1. The external signal sets the i nterrupt flag every time the minimum t
(int)
cycle and time parameters are met. It may be set even with
trigger signals shorter than t
(int)
. Both the cycle and timing specifications must be met to ensure the flag is set. t
(int)
is measured in
MCLK cycles.
leakage current (see Note 1)
PARAMETER TEST CONDITIONS V
CC
MIN NOM MAX UNIT
I
lkg(P1.x)
Leaka
g
e
Port P1 Port 1: V
(P1.x)
(see Note 2)
3
V
±50
n
A
I
lkg(P2.x)
L
e
a
k
a
g
e
current
Port P2 Port 2: V
(P2.x)
(see Note 2)
3
V
±50
n
A
NOTES: 1. The leakage current is measured with V
SS
or V
CC
applied to the corresponding pin(s), unless otherwise noted.
2. The port pin must be selected as an input.
outputs -- Ports P1 and P2
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
V
H
i
g
h
l
e
v
e
l
o
u
t
p
u
t
v
o
l
t
a
g
e
I
OH(max) =
--1.5mA(seeNote1)
3
V
V
CC
--0.25 V
CC
V
V
OH
High-level output voltage
I
OH(max) =
--6mA(seeNote2)
3
V
V
CC
-- 0 . 6 V
CC
V
V
L
o
w
l
e
v
e
l
o
u
t
p
u
t
v
o
l
t
a
g
e
I
OL(max) =
1.5mA(seeNote1)
3
V
V
SS
V
SS
+0.25
V
V
OL
Low-level output voltage
I
OL(max) =
6mA(seeNote2)
3
V
V
SS
V
SS
+0.6
V
NOTES: 1. The maximum total current, I
OH(max)
and I
OL(max),
for all outputs combined, should not exceed ±12 mA to satisfy the
maximum specified voltage drop.
2. The maximum total current, I
OH(max)
and I
OL(max),
for all outputs combined, should not exceed ±48 mA to satisfy the
maximum specified voltage drop.
output frequency
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
f
Px.y
(1 ≤ x ≤ 2, 0 ≤ y ≤ 7) C
L
=20pF,I
L
= ± 1.5 mA 3V dc 12 MHz
f
ACLK,
f
MCLK,
f
SMCLK
P1.1/TA0/MCLK
P1.5/TACLK/ACLK/S28
C
L
=20pF 3V 12 MHz
P
1
5
/
T
A
C
L
K
/
A
C
L
K
/
S
2
8
f
ACLK
=f
LFXT1
=f
XT1
40% 60%
D
u
t
y
c
y
c
l
e
o
f
o
u
t
p
u
t
P1.5/TACLK/ACLK/S28,
C
L
=
2
0
p
F
f
ACLK
=f
LFXT1
=f
LF
30% 70%
t
Xdc
Duty cycle o
f
output
f
r
e
q
u
e
n
c
y
C
L
=
2
0
p
F
f
ACLK
=f
LFXT1
3V
50%
X
d
c
f
r
e
q
u
e
n
c
y
P1.1/TA0/MCLK, C
L
=20pF,f
MCLK
=f
DCOCLK
50%--
15 ns
50%
50%+
15 ns