Datasheet
Table Of Contents
- features
- description
- Available Options
- pin designation
- functional block diagram
- Terminal Functions
- short-form description
- absolute maximum ratings
- recommended operating conditions
- electrical characteristics over recommended operating free-air temperature
- supply current into AVCC + DVCC excluding external
- current consumption of active mode versus system frequency
- current consumption of active mode versus supply voltage
- Schmitt-trigger inputs -- Ports P1 and P2, RST/NMI, JTAG (TCK, TMS, TDI/TCLK, TDO/TDI)
- inputs Px.x, TAx
- leakage current
- outputs -- Ports P1 and P2
- output frequency
- wake-up LPM3
- RAM
- LCD
- USART0
- POR brownout, reset
- SVS (supply voltage supervisor/monitor)
- DCO
- crystal oscillator, LFXT1 oscillator
- SD16, power supply and recommended operating conditions
- SD16, analog input range
- SD16, analog performance (fSD16 = 1MHz, SD16OSRx = 256, SD16REFON = 1)
- SD16, built-in voltage reference
- SD16, built-in reference output buffer
- SD16, external reference input
- flash memory
- JTAG interface
- JTAG fuse
- Application Information
- input/output schematic
- Port P1, P1.0 to P1.1, input/output with Schmitt trigger
- Port P1, P1.2 to P1.7, input/output with Schmitt trigger
- Port P2, P2.0 to P2.1, input/output with Schmitt trigger
- Port P2, P2.2 to P2.5, input/output with Schmitt trigger
- Port P2, unbonded GPIOs P2.6 and P2.7
- JTAG pins (TMS, TCK, TDI/TCLK, TDO/TDI), input/output with Schmitt trigger or output
- JTAG fuse check mode
- input/output schematic
- Data Sheet Revision History

MSP430F42xA
MIXED SIGNAL MICROCONTROLLER
SLAS587 -- FEBRUARY 2008
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
watchdog timer (WDT+)
The primary function of the W DT+ module is to perform a controlled system restart after a software problem
occurs. If the selected time interval expires, a system reset is generated. If the watchdog function is not needed
in an application, the module can be configured as an interval timer and can generate interrupts at selected time
intervals.
Timer_A3
Timer_A3 is a 16-bit timer/counter with three capture/compare r egisters. Timer_A3 can support multiple
capture/compares, PWM outputs, and interval timing. Timer_A3 also has extensive interrupt capabilities.
Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare
registers.
TIMER_A3 SIGNAL CONNECTIONS
INPUT PIN
NUMBER
DEVICE INPUT
SIGNAL
MODULE INPUT
NAME
MODULE BLOCK
MODULE OUTPUT
SIGNAL
OUTPUT PIN
NUMBER
48 - P1.5 TACLK TACLK
ACLK ACLK
T
i
m
e
r
N
A
SMCLK SMCLK
Timer N
A
48 - P1.5 TACLK INCLK
53 - P1.0 TA0 CCI0A
53 - P1.0
52 - P1.1 TA0 CCI0B
C
C
R
0
T
A
0
DV
SS
GND
CCR0 T
A
0
DV
CC
V
CC
51 - P1.2 TA1 CCI1A
51 - P1.2
51 - P1.2 TA1 CCI1B
C
C
R
1
T
A
1
DV
SS
GND
CCR1 T
A
1
DV
CC
V
CC
45 - P2.0 TA2 CCI2A
45 - P2.0
ACLK (internal) CCI2B
C
C
R
2
T
A
2
DV
SS
GND
CCR2 T
A
2
DV
CC
V
CC
universal synchronous/asynchronous receive transmit (USART)
The MSP430F42xA devices have one hardware USART peripheral module (USART0) that is used for serial
data communication. The USART supports synchronous SPI (3 or 4 pin) and asynchronous UART
communication protocols, using double-buffered transmit and receive channels.
hardware multiplier
The multiplication operation is supported by a dedicated peripheral module. The module performs 16×16,
16×8, 8×16, and 8×8 bit operations. The module is capable of supporting signed and unsigned multiplication,
as well as signed and unsigned multiply and accumulate operations. The result of an operation can be accessed
immediately after the operands have been loaded into the peripheral registers. No additional clock cycles are
required.
SD16
The SD16 module integrates three independent 16-bit sigma-delta A/D converters, internal temperature sensor,
and built-in voltage reference. Each channel is designed with a fully differential analog input pair and
programmable gain amplifier input stage.