Datasheet

MSP430F41x2
MIXED SIGNAL MICROCONTROLLER
SLAS648E -- APRIL 2009 -- REVISED MARCH 2011
49
POST OFFICE BOX 655303  DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
flash memory
PARAMETER
TEST
CONDITIONS
V
CC
MIN NOM MAX UNIT
V
CC(PGM/
ERASE)
Program and Erase supply voltage 2.2 3.6 V
f
FTG
Flash Timing Generator frequency 257 476 kHz
I
PGM
Supply current from DV
CC
during program 2.5V/3.6V 3 5 mA
I
ERASE
Supply current from DV
CC
during erase 2.5V/3.6V 3 7 mA
t
CPT
Cumulative program time seeNote1 2.5V/3.6V 10 ms
t
CMErase
Cumulative mass erase time seeNote2 2.5V/3.6V 200 ms
Program/Erase endurance 10
4
10
5
cycles
t
Retention
Data retention duration T
J
=25C 100 years
t
Word
Word or byte program time 35
t
Block, 0
Block program time for 1
st
byte or word 30
t
Block, 1-63
Block program time for each additional byte or word
s
e
e
N
o
t
e
3
21
t
t
Block, End
Block program end-sequence wait time
seeNote3
6
t
FTG
t
Mass Erase
Mass erase time 5297
t
Seg Erase
Segment erase time 4819
NOTES: 1. The cumulative program time must not be exceeded when writing to a 64--byte flash block. This parameter applies to all programming
methods: individual word/byte write and block write modes.
2. The mass erase duration generated by the flash timing generator is at least 11.1 ms ( = 5297x1 / f
FTG
, max = 5297 x 1 / 476 kHz).
To achieve the required cumulative mass erase time the Flash Controller’s mass erase operation can be repeated until this time is
met. (A worst case minimum of 19 cycles is required.)
3. These values are hardwired into the Flash Controller’s state machine (t
FTG
=1/f
FTG
).
JTAG and Spy-Bi-Wire interface
PARAMETER
TEST
CONDITIONS
V
CC
MIN TYP MAX UNIT
f
SBW
Spy-Bi-Wire input frequency 2.2 V/3 V 0 8 MHz
t
SBW,Low
Spy-Bi-Wire low clock pulse length 2.2 V/3 V 0.025 15 us
t
SBW,En
Spy-Bi-Wire enable time,
TEST high to acceptance of first clock edge
(see Note 1)
2.2 V/3 V 1 us
t
SBW,Ret
Spy-Bi-Wire return to normal operation time 2.2 V/3 V 15 100 us
f
T
C
K
i
n
p
u
t
f
r
e
q
u
e
n
c
y
(
s
e
e
N
o
t
e
2
)
2.2 V 0 5 MHz
f
TCK
TCK input
f
requency (see Note 2)
3V 0 10 MHz
R
Internal
Internal pulldown resistance on TEST 2.2 V/3 V 25 60 90 k
NOTES: 1. Tools accessing the Spy-Bi-Wire interface need to wait for the maximum t
SBW,En
time after pulling the TEST/SBWCLK pin high
before applying the first SBWCLK clock edge.
2. f
TCK
may be restricted to meet the timing requirements of the module selected.