Datasheet

MSP430F41x2
MIXED SIGNAL MICROCONTROLLER
SLAS648E -- APRIL 2009 -- REVISED MARCH 2011
41
POST OFFICE BOX 655303  DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
10-bit ADC, built-in voltage reference
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
P
i
t
i
b
i
l
t
i
f
l
I
VREF+
 1 mA, REF2_5V = 0 2.2
V
CC
,
REF+
Positive built-in reference analog
s
u
p
p
l
y
v
o
l
t
a
g
e
r
a
n
g
e
I
VREF+
 0.5 mA, REF2_5V = 1 2.8
V
V
C
C
,
R
E
F
+
supp
l
yvo
l
t
age range
I
VREF+
 1 mA, REF2_5V = 1 2.9
V
V
R
E
F
+
Positive built-in re
f
erence volta
g
e
I
VREF+
 I
VREF+
max, REF2_5V = 0
2.2 V/
3V
1.41 1.5 1.59 V
V
R
E
F
+
P
o
s
i
t
i
v
e
b
u
i
l
t
i
n
r
e
f
e
r
e
n
c
e
v
o
l
t
a
g
e
I
VREF+
 I
VREF+
max, REF2_5V = 1 3V 2.35 2.5 2.65 V
I
M
a
i
m
m
V
l
o
a
d
c
r
r
e
n
t
2.2 V 0.5
m
A
I
LD,VREF+
Maximum V
REF+
load current
3V 1
m
A
V
l
o
a
d
r
e
g
l
a
t
i
o
n
I
VREF+ =
500 A  100 A,
Analog input voltage V
Ax
 0.75 V,
REF2_5V = 0
2.2 V/
3V
2 LSB
V
REF+
load regulation
I
VREF+ =
500 A  100 A,
Analog input voltage V
Ax
 1.25 V,
REF2_5V = 1
3V 2 LSB
V
R
E
F
+
load re
g
ulation res
p
onse
I
VREF+
= 100 A900 A,
V
0
5
x
V
E
r
r
o
r
o
f
ADC10SR = 0 3V 400
n
s
V
R
E
F
+
l
o
a
d
r
e
g
u
l
a
t
i
o
n
r
e
s
p
o
n
s
e
time
V
Ax
 0.5
x
V
REF+,
Error o
f
conversion result  1LSB
ADC10SR = 1 3V 2000
ns
C
VREF+
Max. capacitance at pin V
REF+
(see Note 1)
I
VREF+
1mA,
REFON = 1, REFOUT = 1
2.2 V/
3V
100 pF
TC
REF+
Temperature coefficient
I
VREF+ =
const. with 0 mA  I
VREF+
 1mA
(see Note 3)
2.2 V/
3V
100 ppm/C
t
REFON
Settling time of internal reference
voltage (see Note 2)
I
VREF+ =
0.5 mA, REF2_5V = 0,
REFON = 0  1
3.6 V 30 s
I
VREF+ =
0.5 mA,
REF2 5
V
=0,
ADC10SR = 0 2.2 V 1
t
Settlin
g
time o
f
re
f
erence bu
f
f
er
R
E
F
2
_
5
V
=
0
,
REFON = 1,
REFBURST = 1
ADC10SR = 1 2.2 V 2.5
s
t
REFBURST
S
e
t
t
l
i
n
g
t
i
m
e
o
f
r
e
f
e
r
e
n
c
e
b
u
f
f
e
r
(see Note 2)
I
VREF+ =
0.5 mA,
REF2 5
V
=1,
ADC10SR = 0 3V 2
s
R
E
F
2
_
5
V
=
1
,
REFON = 1,
REFBURST = 1
ADC10SR = 1 3V 4.5
NOTES: 1. The c apacitance applied to the internal buffer operational amplifier, if switched to terminal
P6.4/UCB0CLK/UCA0STE/A4/CA6/V
eref+
/V
ref+
(REFOUT = 1), must be limited; the reference buffer may become unstable,
otherwise.
2. The condition is that the error in a conversion started after t
REFON
or t
RefBuf
is less than 0.5 LSB.
3. Calculated using the box method: ((MAX(V
REF
(T)) -- MIN(V
REF
(T))) / MIN(V
REF
(T)) / (T
MAX
-- T
MIN
)