Datasheet

MSP430F41x2
MIXED SIGNAL MICROCONTROLLER
SLAS648E -- APRIL 2009 -- REVISED MARCH 2011
5
POST OFFICE BOX 655303  DALLAS, TEXAS 75265
functional block diagram
Oscillators
FLL+
VLO
Brownout
Protection
SVS,
SVM
RST/NMI
DVCC DVSS
MCLK
Watchdog
WDT+
15--Bit
Timer _A5
5CC
Registers
CPU
64kB
incl. 16
Registers
EEM
JTAG
Interface
Basic
Timer &
Real--
Time
Clock
LCD_A
144
Segments
1,2,3,4
Mux
Comparator
_A+
AVCC AVSS P1.x/P2.x
2x8
P3.x/P4.x
2x8
SMCLK
ACLK
MDB
MAB
Ports
P1/P2
2x8 I/O
Interrupt
capability
XIN XOUT
RAM
512B
512B
Flash
16kB
8kB
USCI A0
UART/
LIN,
IrDA, SPI
USCI B0
SPI, I2C
Ports
P3/P4
2x8 I/O
ADC10
10--bit
8 Channels
Autoscan
DTC
Timer _A3
3CC
Registers
Ports
P5/P6
2x8 I/O
P5.x/P6.x
2x8
S p y --B i --
Wire
Port
P7
1x7 I/O
1x7
P7.x
NOTE: The USCI A0 and USCI B0 cannot be used in the 48-pin package options (RGZ).